ADC Channel 0 Inconsistent Behavior on nRF52 – Suspected NVM Conflict

Hello everyone,

I'm facing a strange issue and would appreciate your input.


Background

This is an electrical sensor device that reads the main AC line and load data, performs local processing, and publishes the results to the cloud via LoRaWAN.
Note: The SoftDevice is not in use.


System Setup

  • MCU: nRF52832

  • ADC: 7 channels enabled, acquisition time = 3µs

  • Sampling: Triggered via TIMER0 through PPI

  • Samples per channel: 840

  • Timer period: 40µs → total ADC conversion takes ~33.6ms

  • Sampling frequency: Every 2 seconds

  • LoRaWAN uplink: Once every 60 seconds


Problem Statement

ADC Channel 0 intermittently fails to sample its input signal.
The behavior is inconsistent — it may work after a power cycle or it may not.


Troubleshooting Observations

  • If NVM access is disabled or writes are kept under 128 bytes, channel 0 behaves correctly.

  • The issue occurs even though NVM writes only happen during boot, right after system initialization and before ADC sampling.


Temporary Workaround

As a quick fix, I deferred the ADC initialization until after the NVM write operations. This seems to solve the issue, but it's clearly a workaround.
I'd like to understand the root cause and find a proper solution.


Any Suggestions?

Has anyone experienced similar behavior with the nRF52 ADC or internal flash/NVM writes?
Could this be related to SAADC hardware limitations, flash controller interaction, or analog pin instability?

Any insights would be greatly appreciated!

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