nPM1300 efficiency

My eval setup is PPK2(source mode) -> nPM1300EV - -> nRF54L15DK. I have my load connected to BUCK2, everything else is disabled.

I'm getting higher than expected input current consumption as measured by the PPK2.

Because nRFDK is a complex load, for the purpose of measurement I connected a 22K Ohm resistor to the output of nPM1300EV which should draw slightly more than the average amount of current as my nRF board. So PK2(source mode) -> nPM1300EV - -> 22K load.

My measurements are thus:

Input voltage 3.6v

Input average current 60uA

Output voltage 1.8v

Load current 81uA

This gives an overall efficiency of 69% which is low. How much can this be improved?

Also, I notice that when I disconnect the load completely there is a quiescent draw of ~8uA, comprised of high (2mA) spikes every 1 second. I assume this is the EV board's host CPU polling the nPM1300?

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  • Hello, you can disable the polling with 'log halt' command in the terminal window. This will get rid of the 1s current spikes. 

    Also note that the VDDIO is powered by default by buck2 and that will increase the current consumption. You can supply the VDDIO with external 1.8V supply (connected to the P18 center pin) to remove this current consumption from the equation. 

    You can also disable buck1 to get the quiescent current down. 

    In no load condition, both bucks running you should be in 800nA quiescent current from VBAT. 

Reply
  • Hello, you can disable the polling with 'log halt' command in the terminal window. This will get rid of the 1s current spikes. 

    Also note that the VDDIO is powered by default by buck2 and that will increase the current consumption. You can supply the VDDIO with external 1.8V supply (connected to the P18 center pin) to remove this current consumption from the equation. 

    You can also disable buck1 to get the quiescent current down. 

    In no load condition, both bucks running you should be in 800nA quiescent current from VBAT. 

Children
  • Hi Thanks for the reply.

    Also note that the VDDIO is powered by default by buck2 and that will increase the current consumption. You can supply the VDDIO with external 1.8V supply (connected to the P18 center pin) to remove this current consumption from the equation. 

    OK, but that's a bit academic  because from my reading of the PS, VDDIO is always required..?

    VDDIO must be present in all operating modes of the chip, except in Ship and Hibernate modes.

    ...so in a real-world product VDDIO is always part of the equation.

    I'll re-test with the logging halted which should get a slightly more accurate result, then proceed from there.

  • The VDDIO is also going to the nRF Controller and level shifters on the board, so we don't want to include that if we want to measure nPM1300 efficiency. The VDDIO quiescent current of nPM1300 itself is negligible

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