Dear Nordic,
I'm using TIMER21 for our library, but I encounter problems with CC channels 6 and 7: their compare events never fire.
The problem
I configure the timer to generate an interrupt at specific intervals by loading ascending compare values to the CC registers (avg. ~4ms apart). Channel 7, the largest value, also has a `CLEAR + STOP` short configured to stop the timer after it has reached this value.
During my testing, I found that CC registers 0..5 behave as expected. I see in the logs that interrupts with their `compare` events are generated.
However, the `compare` events from channels 6 and 7 are never generated, nor is the timer stopped after reaching the value from channel 7.
The timer eventually overflows after ~1 second, and events from channels 0..5 fire again repeatedly.
To exclude a configuration error, I swapped the duties and values of the channels. I swapped the `compare` values of channels 2 and 7 (incl. the short), and 3 and 6. In this test, channels 2 and 3 successfully fired a compare event, and the timer stopped after reaching the value of channel 2 (highest value + stop short). However, channels 6 and 7 (lower compare values) still failed to fire any compare events.
Firmware configurations
.rx_timer_cfg = { .frequency = NRFX_MHZ_TO_HZ(16), .bit_width = NRF_TIMER_BIT_WIDTH_24, .mode = NRF_TIMER_MODE_TIMER, .interrupt_priority = NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY, }, ret = nrfx_timer_init(&cfg->rx_timer, &cfg->rx_timer_cfg, rx_timer_handler); __ASSERT(ret == NRFX_SUCCESS, "Timer init error"); IRQ_CONNECT(RX_TIMER_INTERRUPT, CONFIG_RX_TIMER_IRQ_PRIO, RX_TIMER_IRQ_HANDLER, NULL, 0); uint32_t ticks = nrfx_timer_us_to_ticks(&cfg->rx_timer, 19820); // 317120 ticks nrfx_timer_extended_compare(&cfg->rx_timer, NRF_TIMER_CC_CHANNEL6, ticks, 0, true);
Project details:
- NCS version: v3.0.1
- SOC: nRF54L15
- Timer instance: 21
- Log mode: Deferred