SPI speed and consistency issues using nRF52840 with ADS131M04EVM

[BenD]

Howdy!

I am attempting to develop a system using an nRF52840 and an ADS131M04EVM (ADC). Our application requires us to collect data at a high sampling rate (>= 16k SPS). According to the ADS131M04 datasheet, this should be well within its possible data rate. The max data rate using high resolution mode should be 64k SPS. However, using our current hardware set up and software, we are maxing out at ~11k SPS (even before trying to process and send the data off the device). It seems like part of the limiting factor for our speed is lag from the Chip Select pin. The ADS131 pulls the DRDY pin high whenever new data is available for reading. When we are just letting the ADS131 run, the DRDY pin will run at the correct frequency.

However, when we try to read data from the ADS131 using spi_tranceive_dt() according to the method described in the data sheet, the communication / Chip Select speed seems to limit our ability to read in values at a higher rate. The Chip Select seems to stay low well after we are done communicating.

We have tried increasing the SPI max frequency and that helped marginally. We are using SPI3, so that we can run the system at 32MHz. However, when we try to increase the SPI max frequency above ~15MHz we begin to get inconsistent reads from the ADS131 even though the ADC should be able to handle up to 25MHz. For instance, the Device ID would send a value of 0x28 about half the time instead of the correct value of 0x24.

Any guidance on improving the speed and inconsistency of our SPI reading / writing would be greatly appreciated! I am not sure what else to optimize because it seems like the provided SPI transceive function is part of the problem.

Operating System

Microsoft Windows 11 Enterprise (10.0.26100 Build 26100)

Hardware

nRF52840DK - PCA10056 (3.0.2 - 2024.33)

ADS131M04EVM

Software Specifications

nRF Connect for Desktop v5.2.0

nRF Connect for VS Code Extension Pack 2025.4.4

nRF Connect SDK v3.0.1

nRF Connect SDK Toolchain v3.0.1

Files

Fullscreen SPI_IO_nRF.c Download

/**
 ********************************************************************************
 * @file    SPI_IO_nRF.h
 * @author  A. Guzman
 * @date    July 2, 2025
 * @brief
 ********************************************************************************
 */

#include <zephyr/kernel.h>
#include <zephyr/drivers/spi.h>
#include <zephyr/drivers/gpio.h>

#include <string.h>

#include "SPI_IO_nRF.h"

extern struct spi_dt_spec spi_dev;
extern struct gpio_dt_spec cs_gpio;

// void SPI_IO_CS_Low(void) {
//     gpio_pin_set_dt(&cs_gpio, 0);
// }

// void SPI_IO_CS_High(void) {
//     gpio_pin_set_dt(&cs_gpio, 1);
// }

void SPI_IO_Delay(uint32_t ms) {
    k_msleep(ms);
}

int SPI_IO_Transfer(const struct spi_dt_spec *spi,
                    const uint8_t *tx_buf,
                    uint8_t *rx_buf,
                    size_t len)
{
    struct spi_buf tx = {
        .buf = (void *)tx_buf,
        .len = len
    };
    struct spi_buf rx = {
        .buf = rx_buf,
        .len = len
    };

    struct spi_buf_set tx_set = {
        .buffers = &tx,
        .count = 1
    };
    struct spi_buf_set rx_set = {
        .buffers = &rx,
        .count = 1
    };

    return spi_transceive_dt(spi, &tx_set, &rx_set);
}

Fullscreen SamplingRate.c Download

#include <zephyr/kernel.h>
#include <zephyr/sys/printk.h>
#include <zephyr/device.h>
#include <zephyr/drivers/spi.h>
#include <zephyr/drivers/gpio.h>
#include <stdio.h>
#include "OBSL-ADS131M0x/SPI_IO_nRF.h"
#include "OBSL-ADS131M0x/ads131m0x.h"
#include "OBSL-ADS131M0x/ads131_reg_defs.h"

#define SPIOP_ADS131 (SPI_WORD_SET(8) | SPI_TRANSFER_MSB | SPI_MODE_CPHA)
struct spi_dt_spec spi_dev = SPI_DT_SPEC_GET(DT_NODELABEL(ads131m02), SPIOP_ADS131, 0);

#define ADS_NODE DT_NODELABEL(ads131m02)
const struct gpio_dt_spec drdy_gpio = GPIO_DT_SPEC_GET(ADS_NODE, drdy_gpios);
static struct gpio_callback drdy_cb;

volatile bool interrupt_flag = false;
volatile bool busy = false;

#define NUM_SAMPLES 1024
int sample_index = 0;

uint32_t start_time = 0;
uint32_t end_time = 0;

void drdy_isr_handler(const struct device *port, struct gpio_callback *cb, uint32_t pins)
{
    ARG_UNUSED(port);
    ARG_UNUSED(cb);
    ARG_UNUSED(pins);
    interrupt_flag = true;
}

int main(void)
{
    if (!spi_is_ready_dt(&spi_dev)) {
        printk("SPI not ready\n");
        return 0;
    }

    if (!device_is_ready(drdy_gpio.port)) {
        printk("DRDY GPIO not ready\n");
        return 0;
    }

    // Configure DRDY GPIO and ISR
    gpio_pin_configure_dt(&drdy_gpio, GPIO_INPUT);
    gpio_pin_interrupt_configure_dt(&drdy_gpio, GPIO_INT_EDGE_TO_ACTIVE);
    gpio_init_callback(&drdy_cb, drdy_isr_handler, BIT(drdy_gpio.pin));
    gpio_add_callback(drdy_gpio.port, &drdy_cb);

    // Read the device ID
    uint16_t id = 0;
    if (ADS131_GetID(&spi_dev, &id) == ADS131M0x_OK) {
        printk("Device ID: 0x%04X\n", id);
    } else {
        printk("Failed to read ID\n");
    }

    // device is out of reset
    ADS131_Mode_SetReset(&spi_dev, ADS131M0x_MODE_RESET_CLEAR_BIT);

    // set OSR
    ADS131_Clock_SetOSR(&spi_dev, ADS131M0x_CLOCK_OSR_128);
    k_msleep(10);
    uint16_t clk_reg = 0;

    ADS131M0x_ReadRegister(&spi_dev, ADS131M0x_CLOCK, &clk_reg);
    printk("CLOCK Reg Confirm: 0x%04X\n", clk_reg);

    // clear pending DRDY
    while (gpio_pin_get_dt(&drdy_gpio) == 0) {
        k_busy_wait(10);
    }

    interrupt_flag = false;
    sample_index = 0;
    start_time = k_uptime_get();

    while (sample_index < NUM_SAMPLES) {
        if (interrupt_flag && !busy) {
            busy = true;
            interrupt_flag = false;

            uint8_t tx_buf[15] = {0};
            uint8_t rx_buf[15] = {0};

            if (SPI_IO_Transfer(&spi_dev, tx_buf, rx_buf, sizeof(tx_buf)) != 0) {
                printk("SPI transfer failed\n");
                busy = false;
                continue;
            }

            int32_t raw0 = (rx_buf[3] << 16) | (rx_buf[4] << 8) | rx_buf[5];
            int32_t raw1 = (rx_buf[6] << 16) | (rx_buf[7] << 8) | rx_buf[8];

            // Sign extension
            if (raw0 & 0x800000) raw0 |= 0xFF000000;
            if (raw1 & 0x800000) raw1 |= 0xFF000000;

            // printf("%d %d\n", raw0, raw1);

            sample_index++;
            busy = false;
        }
    }

    end_time = k_uptime_get();
    uint32_t duration = end_time - start_time;
    float sps = (1000.0f * NUM_SAMPLES) / duration;

    printk("\nSampling Complete\n");
    printk("Duration: %u ms\n", duration);
    printk("Effective SPS: %d\n", (int)sps);

    while (1) k_sleep(K_FOREVER);
    return 0;
}

Fullscreen ads131m0x.c Download

/**
 ********************************************************************************
 * @file    ads131m0x.c
 * @author  A. Guzman
 * @date    July 2, 2025
 * @brief   Register I/O implementation for ADS131M0x
 ********************************************************************************
 */

#include "ads131m0x.h"
#include "ads131_reg_defs.h"
#include "SPI_IO_nRF.h"


ADS131M0x_StatusTypeDef ADS131M0x_ReadRegister(void *handle, uint8_t address, uint16_t *value) {
    const struct spi_dt_spec *spi = (const struct spi_dt_spec *)handle;

    uint8_t tx_buf1[3] = {
        (uint8_t)((OPCODE_RREG | ((address & 0x1F) << 7)) >> 8),
        (uint8_t)(OPCODE_RREG | ((address & 0x1F) << 7)),
        0x00
    };
    uint8_t rx_buf1[3] = {0};

    if (SPI_IO_Transfer(spi, tx_buf1, rx_buf1, 3) != 0)
        return ADS131M0x_ERROR;

    uint8_t tx_buf2[3] = {0x00, 0x00, 0x00};
    uint8_t rx_buf2[3] = {0};

    if (SPI_IO_Transfer(spi, tx_buf2, rx_buf2, 3) != 0)
        return ADS131M0x_ERROR;

    *value = ((uint16_t)rx_buf2[0] << 8) | rx_buf2[1];
    return ADS131M0x_OK;
}

ADS131M0x_StatusTypeDef ADS131M0x_WriteRegister(void *handle, uint8_t address, uint16_t reg_value) {
    const struct spi_dt_spec *spi = (const struct spi_dt_spec *)handle;

    uint8_t tx_buf[6] = {
        (uint8_t)((OPCODE_WREG | ((address & 0x1F) << 7)) >> 8),
        (uint8_t)(OPCODE_WREG | ((address & 0x1F) << 7)),
        0x00,
        (uint8_t)(reg_value >> 8),
        (uint8_t)(reg_value & 0xFF),
        0x00
    };

    uint8_t rx_buf[6] = {0};

    if (SPI_IO_Transfer(spi, tx_buf, rx_buf, 6) != 0)
        return ADS131M0x_ERROR;

    return ADS131M0x_OK;
}


//****ID Register Getter ****//
ADS131M0x_StatusTypeDef ADS131_GetID(void *handle, uint16_t *id)
{
    if (!id) return ADS131M0x_ERROR;

    if (ADS131M0x_ReadRegister(handle, ADS131M0x_ID, id) != ADS131M0x_OK)
        return ADS131M0x_ERROR;

    return ADS131M0x_OK;
}


//****STATUS Register Getters ****//
ADS131M0x_StatusTypeDef ADS131_Status_GetLock(void *handle, ADS131M0x_STATUS_LOCK_t *mode) {
    if (!mode) return ADS131M0x_ERROR;

    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_STATUS, &reg) != ADS131M0x_OK)
        return ADS131M0x_ERROR;

    *mode = (ADS131M0x_STATUS_LOCK_t)(reg & ~ADS131M0x_STATUS_LOCK_MASK);
    return ADS131M0x_OK;
}

ADS131M0x_StatusTypeDef ADS131_Status_GetFrameResync(void *handle, ADS131M0x_STATUS_F_RESYNC_t *mode) {
    if (!mode) return ADS131M0x_ERROR;

    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_STATUS, &reg) != ADS131M0x_OK)
        return ADS131M0x_ERROR;

    *mode = (ADS131M0x_STATUS_F_RESYNC_t)(reg & ~ADS131M0x_STATUS_F_RESYNC_MASK);
    return ADS131M0x_OK;
}

ADS131M0x_StatusTypeDef ADS131_Status_GetRegMap(void *handle, ADS131M0x_STATUS_REG_MAP_t *mode) {
    if (!mode) return ADS131M0x_ERROR;

    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_STATUS, &reg) != ADS131M0x_OK)
        return ADS131M0x_ERROR;

    *mode = (ADS131M0x_STATUS_REG_MAP_t)(reg & ~ADS131M0x_STATUS_REG_MAP_MASK);
    return ADS131M0x_OK;
}

ADS131M0x_StatusTypeDef ADS131_Status_GetCrcError(void *handle, ADS131M0x_STATUS_CRC_ERR_t *mode) {
    if (!mode) return ADS131M0x_ERROR;

    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_STATUS, &reg) != ADS131M0x_OK)
        return ADS131M0x_ERROR;

    *mode = (ADS131M0x_STATUS_CRC_ERR_t)(reg & ~ADS131M0x_STATUS_CRC_ERR_MASK);
    return ADS131M0x_OK;
}

ADS131M0x_StatusTypeDef ADS131_Status_GetCrcType(void *handle, ADS131M0x_STATUS_CRC_TYPE_t *mode) {
    if (!mode) return ADS131M0x_ERROR;

    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_STATUS, &reg) != ADS131M0x_OK)
        return ADS131M0x_ERROR;

    *mode = (ADS131M0x_STATUS_CRC_TYPE_t)(reg & ~ADS131M0x_STATUS_CRC_TYPE_MASK);
    return ADS131M0x_OK;
}

ADS131M0x_StatusTypeDef ADS131_Status_GetReset(void *handle, ADS131M0x_STATUS_RESET_t *mode) {
    if (!mode) return ADS131M0x_ERROR;

    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_STATUS, &reg) != ADS131M0x_OK)
        return ADS131M0x_ERROR;

    *mode = (ADS131M0x_STATUS_RESET_t)(reg & ~ADS131M0x_STATUS_RESET_MASK);
    return ADS131M0x_OK;
}

ADS131M0x_StatusTypeDef ADS131_Status_GetWordLength(void *handle, ADS131M0x_STATUS_WLENGTH_t *mode) {
    if (!mode) return ADS131M0x_ERROR;

    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_STATUS, &reg) != ADS131M0x_OK)
        return ADS131M0x_ERROR;

    *mode = (ADS131M0x_STATUS_WLENGTH_t)(reg & ~ADS131M0x_STATUS_WLENGTH_MASK);
    return ADS131M0x_OK;
}

ADS131M0x_StatusTypeDef ADS131_Status_GetDrdy3(void *handle, ADS131M0x_STATUS_DRDYx_t *mode) {
    if (!mode) return ADS131M0x_ERROR;

    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_STATUS, &reg) != ADS131M0x_OK)
        return ADS131M0x_ERROR;

        
    *mode = (reg >> 3) & 0x01 ? ADS131M0x_STATUS_DRDYx_NEW_DATA : ADS131M0x_STATUS_DRDYx_NO_NEW_DATA;
    return ADS131M0x_OK;
}

ADS131M0x_StatusTypeDef ADS131_Status_GetDrdy2(void *handle, ADS131M0x_STATUS_DRDYx_t *mode) {
    if (!mode) return ADS131M0x_ERROR;

    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_STATUS, &reg) != ADS131M0x_OK)
        return ADS131M0x_ERROR;

    *mode = (reg >> 2) & 0x01 ? ADS131M0x_STATUS_DRDYx_NEW_DATA : ADS131M0x_STATUS_DRDYx_NO_NEW_DATA;
    return ADS131M0x_OK;
}

ADS131M0x_StatusTypeDef ADS131_Status_GetDrdy1(void *handle, ADS131M0x_STATUS_DRDYx_t *mode) {
    if (!mode) return ADS131M0x_ERROR;

    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_STATUS, &reg) != ADS131M0x_OK)
        return ADS131M0x_ERROR;

    *mode = (reg >> 1) & 0x01 ? ADS131M0x_STATUS_DRDYx_NEW_DATA : ADS131M0x_STATUS_DRDYx_NO_NEW_DATA;
    return ADS131M0x_OK;
}

ADS131M0x_StatusTypeDef ADS131_Status_GetDrdy0(void *handle, ADS131M0x_STATUS_DRDYx_t *mode) {
    if (!mode) return ADS131M0x_ERROR;

    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_STATUS, &reg) != ADS131M0x_OK)
        return ADS131M0x_ERROR;

    *mode = reg & 0x01 ? ADS131M0x_STATUS_DRDYx_NEW_DATA : ADS131M0x_STATUS_DRDYx_NO_NEW_DATA;
    return ADS131M0x_OK;
}

//****MODE Register Getters ****//

ADS131M0x_StatusTypeDef ADS131_Mode_GetRegCrcEn(void *handle, ADS131M0x_MODE_REG_CRC_EN_t* mode){
    if (!mode) return ADS131M0x_ERROR;

    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_MODE, &reg) != ADS131M0x_OK)
        return ADS131M0x_ERROR;

    *mode = (ADS131M0x_MODE_REG_CRC_EN_t)(reg & ~ADS131M0x_MODE_REG_CRC_EN_MASK);
    return ADS131M0x_OK;
}

ADS131M0x_StatusTypeDef ADS131_Mode_SetRegCrcEn(void *handle, ADS131M0x_MODE_REG_CRC_EN_t mode){
    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_MODE, &reg) != ADS131M0x_OK)
        return ADS131M0x_ERROR;

    reg &= ADS131M0x_MODE_REG_CRC_EN_MASK;
    reg |= mode;

    return ADS131M0x_WriteRegister(handle, ADS131M0x_MODE, reg);
}

ADS131M0x_StatusTypeDef ADS131_Mode_GetRXCrcEn(void *handle, ADS131M0x_MODE_RX_CRC_EN_t* mode){
    if (!mode) return ADS131M0x_ERROR;

    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_MODE, &reg) != ADS131M0x_OK)
        return ADS131M0x_ERROR;

    *mode = (ADS131M0x_MODE_RX_CRC_EN_t)(reg & ~ADS131M0x_MODE_RX_CRC_EN_MASK);
    return ADS131M0x_OK;
}

ADS131M0x_StatusTypeDef ADS131_Mode_SetRXCrcEn(void *handle, ADS131M0x_MODE_RX_CRC_EN_t mode){
    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_MODE, &reg) != ADS131M0x_OK)
        return ADS131M0x_ERROR;

    reg &= ADS131M0x_MODE_RX_CRC_EN_MASK;
    reg |= mode;

    return ADS131M0x_WriteRegister(handle, ADS131M0x_MODE, reg);
}

ADS131M0x_StatusTypeDef ADS131_Mode_GetCrcType(void *handle, ADS131M0x_MODE_CRC_TYPE_t* mode){
    if (!mode) return ADS131M0x_ERROR;

    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_MODE, &reg) != ADS131M0x_OK)
        return ADS131M0x_ERROR;

    *mode = (ADS131M0x_MODE_CRC_TYPE_t)(reg & ~ADS131M0x_MODE_CRC_TYPE_MASK);
    return ADS131M0x_OK;
}

ADS131M0x_StatusTypeDef ADS131_Mode_SetCrcType(void *handle, ADS131M0x_MODE_CRC_TYPE_t mode){
    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_MODE, &reg) != ADS131M0x_OK)
        return ADS131M0x_ERROR;

    reg &= ADS131M0x_MODE_CRC_TYPE_MASK;
    reg |= mode;

    return ADS131M0x_WriteRegister(handle, ADS131M0x_MODE, reg);
}

ADS131M0x_StatusTypeDef ADS131_Mode_GetReset(void *handle, ADS131M0x_MODE_RESET_t* mode){
    if (!mode) return ADS131M0x_ERROR;

    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_MODE, &reg) != ADS131M0x_OK)
        return ADS131M0x_ERROR;

    *mode = (ADS131M0x_MODE_RESET_t)(reg & ~ADS131M0x_MODE_RESET_MASK);
    return ADS131M0x_OK;
}

ADS131M0x_StatusTypeDef ADS131_Mode_SetReset(void *handle, ADS131M0x_MODE_RESET_t mode){
    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_MODE, &reg) != ADS131M0x_OK)
        return ADS131M0x_ERROR;

    reg &= ADS131M0x_MODE_RESET_MASK;
    reg |= mode;

    return ADS131M0x_WriteRegister(handle, ADS131M0x_MODE, reg);
}

ADS131M0x_StatusTypeDef ADS131_Mode_GetWordLength(void *handle, ADS131M0x_MODE_WLENGTH_t* mode){
    if (!mode) return ADS131M0x_ERROR;

    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_MODE, &reg) != ADS131M0x_OK)
        return ADS131M0x_ERROR;

    *mode = (ADS131M0x_MODE_WLENGTH_t)(reg & ~ADS131M0x_MODE_WLENGTH_MASK);
    return ADS131M0x_OK;
}

ADS131M0x_StatusTypeDef ADS131_Mode_SetWordLength(void *handle, ADS131M0x_MODE_WLENGTH_t mode){
    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_MODE, &reg) != ADS131M0x_OK)
        return ADS131M0x_ERROR;

    reg &= ADS131M0x_MODE_WLENGTH_MASK;
    reg |= mode;

    return ADS131M0x_WriteRegister(handle, ADS131M0x_MODE, reg);
}

ADS131M0x_StatusTypeDef ADS131_Mode_GetTimeout(void *handle, ADS131M0x_MODE_TIMEOUT_t* mode){
    if (!mode) return ADS131M0x_ERROR;

    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_MODE, &reg) != ADS131M0x_OK)
        return ADS131M0x_ERROR;

    *mode = (ADS131M0x_MODE_TIMEOUT_t)(reg & ~ADS131M0x_MODE_TIMEOUT_MASK);
    return ADS131M0x_OK;
}

ADS131M0x_StatusTypeDef ADS131_Mode_SetTimeout(void *handle, ADS131M0x_MODE_TIMEOUT_t mode){
    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_MODE, &reg) != ADS131M0x_OK)
        return ADS131M0x_ERROR;

    reg &= ADS131M0x_MODE_TIMEOUT_MASK;
    reg |= mode;

    return ADS131M0x_WriteRegister(handle, ADS131M0x_MODE, reg);
}

ADS131M0x_StatusTypeDef ADS131_Mode_GetDrdySelect(void *handle, ADS131M0x_MODE_DRDY_SEL_t* mode){
    if (!mode) return ADS131M0x_ERROR;

    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_MODE, &reg) != ADS131M0x_OK)
        return ADS131M0x_ERROR;

    *mode = (ADS131M0x_MODE_DRDY_SEL_t)(reg & ~ADS131M0x_MODE_DRDY_SEL_MASK);
    return ADS131M0x_OK;
}

ADS131M0x_StatusTypeDef ADS131_Mode_SetDrdySelect(void *handle, ADS131M0x_MODE_DRDY_SEL_t mode){
    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_MODE, &reg) != ADS131M0x_OK)
        return ADS131M0x_ERROR;

    reg &= ADS131M0x_MODE_DRDY_SEL_MASK;
    reg |= mode;

    return ADS131M0x_WriteRegister(handle, ADS131M0x_MODE, reg);
}

ADS131M0x_StatusTypeDef ADS131_Mode_GetDrdyHiZ(void *handle, ADS131M0x_MODE_DRDY_HiZ_t* mode){
    if (!mode) return ADS131M0x_ERROR;

    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_MODE, &reg) != ADS131M0x_OK)
        return ADS131M0x_ERROR;

    *mode = (ADS131M0x_MODE_DRDY_HiZ_t)(reg & ~ADS131M0x_MODE_DRDY_HiZ_MASK);
    return ADS131M0x_OK;
}

ADS131M0x_StatusTypeDef ADS131_Mode_SetDrdyHiZ(void *handle, ADS131M0x_MODE_DRDY_HiZ_t mode){
    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_MODE, &reg) != ADS131M0x_OK)
        return ADS131M0x_ERROR;

    reg &= ADS131M0x_MODE_DRDY_HiZ_MASK;
    reg |= mode;

    return ADS131M0x_WriteRegister(handle, ADS131M0x_MODE, reg);
}

ADS131M0x_StatusTypeDef ADS131_Mode_GetDrdyFMT(void *handle, ADS131M0x_MODE_DRDY_FMT_t* mode){
    if (!mode) return ADS131M0x_ERROR;

    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_MODE, &reg) != ADS131M0x_OK)
        return ADS131M0x_ERROR;

    *mode = (ADS131M0x_MODE_DRDY_FMT_t)(reg & ~ADS131M0x_MODE_DRDY_FMT_MASK);
    return ADS131M0x_OK;
}

ADS131M0x_StatusTypeDef ADS131_Mode_SetDrdyFMT(void *handle, ADS131M0x_MODE_DRDY_FMT_t mode){
    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_MODE, &reg) != ADS131M0x_OK)
        return ADS131M0x_ERROR;

    reg &= ADS131M0x_MODE_DRDY_FMT_MASK;
    reg |= mode;

    return ADS131M0x_WriteRegister(handle, ADS131M0x_MODE, reg);
}


//****CLOCK Register Getters & Setters ****//

ADS131M0x_StatusTypeDef ADS131_Clock_GetCH3Enable(void *handle, ADS131M0x_CLOCK_CH3_EN_t *mode) {
    if (!mode) return ADS131M0x_ERROR;
    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_CLOCK, &reg) != ADS131M0x_OK) return ADS131M0x_ERROR;
    *mode = (ADS131M0x_CLOCK_CH3_EN_t)(reg & ~ADS131M0x_CLOCK_CH3_EN_MASK);
    return ADS131M0x_OK;
}

ADS131M0x_StatusTypeDef ADS131_Clock_SetCH3Enable(void *handle, ADS131M0x_CLOCK_CH3_EN_t mode) {
    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_CLOCK, &reg) != ADS131M0x_OK) return ADS131M0x_ERROR;
    reg &= ADS131M0x_CLOCK_CH3_EN_MASK;
    reg |= mode;
    return ADS131M0x_WriteRegister(handle, ADS131M0x_CLOCK, reg);
}

ADS131M0x_StatusTypeDef ADS131_Clock_GetCH2Enable(void *handle, ADS131M0x_CLOCK_CH2_EN_t *mode) {
    if (!mode) return ADS131M0x_ERROR;
    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_CLOCK, &reg) != ADS131M0x_OK) return ADS131M0x_ERROR;
    *mode = (ADS131M0x_CLOCK_CH2_EN_t)(reg & ~ADS131M0x_CLOCK_CH2_EN_MASK);
    return ADS131M0x_OK;
}

ADS131M0x_StatusTypeDef ADS131_Clock_SetCH2Enable(void *handle, ADS131M0x_CLOCK_CH2_EN_t mode) {
    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_CLOCK, &reg) != ADS131M0x_OK) return ADS131M0x_ERROR;
    reg &= ADS131M0x_CLOCK_CH2_EN_MASK;
    reg |= mode;
    return ADS131M0x_WriteRegister(handle, ADS131M0x_CLOCK, reg);
}


ADS131M0x_StatusTypeDef ADS131_Clock_GetCH1Enable(void *handle, ADS131M0x_CLOCK_CH1_EN_t *mode) {
    if (!mode) return ADS131M0x_ERROR;
    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_CLOCK, &reg) != ADS131M0x_OK) return ADS131M0x_ERROR;
    *mode = (ADS131M0x_CLOCK_CH1_EN_t)(reg & ~ADS131M0x_CLOCK_CH1_EN_MASK);
    return ADS131M0x_OK;
}

ADS131M0x_StatusTypeDef ADS131_Clock_SetCH1Enable(void *handle, ADS131M0x_CLOCK_CH1_EN_t mode) {
    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_CLOCK, &reg) != ADS131M0x_OK) return ADS131M0x_ERROR;
    reg &= ADS131M0x_CLOCK_CH1_EN_MASK;
    reg |= mode;
    return ADS131M0x_WriteRegister(handle, ADS131M0x_CLOCK, reg);
}

ADS131M0x_StatusTypeDef ADS131_Clock_GetCH0Enable(void *handle, ADS131M0x_CLOCK_CH0_EN_t *mode) {
    if (!mode) return ADS131M0x_ERROR;
    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_CLOCK, &reg) != ADS131M0x_OK) return ADS131M0x_ERROR;
    *mode = (ADS131M0x_CLOCK_CH0_EN_t)(reg & ~ADS131M0x_CLOCK_CH0_EN_MASK);
    return ADS131M0x_OK;
}

ADS131M0x_StatusTypeDef ADS131_Clock_SetCH0Enable(void *handle, ADS131M0x_CLOCK_CH0_EN_t mode) {
    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_CLOCK, &reg) != ADS131M0x_OK) return ADS131M0x_ERROR;
    reg &= ADS131M0x_CLOCK_CH0_EN_MASK;
    reg |= mode;
    return ADS131M0x_WriteRegister(handle, ADS131M0x_CLOCK, reg);
}

ADS131M0x_StatusTypeDef ADS131_Clock_GetTBM(void *handle, ADS131M0x_CLOCK_TBM_t *mode) {
    if (!mode) return ADS131M0x_ERROR;
    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_CLOCK, &reg) != ADS131M0x_OK) return ADS131M0x_ERROR;
    *mode = (ADS131M0x_CLOCK_TBM_t)(reg & ~ADS131M0x_CLOCK_TBM_MASK);
    return ADS131M0x_OK;
}

ADS131M0x_StatusTypeDef ADS131_Clock_SetTBM(void *handle, ADS131M0x_CLOCK_TBM_t mode) {
    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_CLOCK, &reg) != ADS131M0x_OK) return ADS131M0x_ERROR;
    reg &= ADS131M0x_CLOCK_TBM_MASK;
    reg |= mode;
    return ADS131M0x_WriteRegister(handle, ADS131M0x_CLOCK, reg);
}

ADS131M0x_StatusTypeDef ADS131_Clock_GetOSR(void *handle, ADS131M0x_CLOCK_OSR_t *osr) {
    if (!osr) return ADS131M0x_ERROR;
    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_CLOCK, &reg) != ADS131M0x_OK) return ADS131M0x_ERROR;
    *osr = (ADS131M0x_CLOCK_OSR_t)(reg & ~ADS131M0x_CLOCK_OSR_MASK);
    return ADS131M0x_OK;
}

ADS131M0x_StatusTypeDef ADS131_Clock_SetOSR(void *handle, ADS131M0x_CLOCK_OSR_t osr) {
    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_CLOCK, &reg) != ADS131M0x_OK) return ADS131M0x_ERROR;
    reg &= ADS131M0x_CLOCK_OSR_MASK;
    reg |= osr;
    return ADS131M0x_WriteRegister(handle, ADS131M0x_CLOCK, reg);
}

ADS131M0x_StatusTypeDef ADS131_Clock_GetPowerMode(void *handle, ADS131M0x_CLOCK_PWR_t *mode) {
    if (!mode) return ADS131M0x_ERROR;
    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_CLOCK, &reg) != ADS131M0x_OK) return ADS131M0x_ERROR;
    *mode = (ADS131M0x_CLOCK_PWR_t)(reg & ~ADS131M0x_CLOCK_PWR_MASK);
    return ADS131M0x_OK;
}

ADS131M0x_StatusTypeDef ADS131_Clock_SetPowerMode(void *handle, ADS131M0x_CLOCK_PWR_t mode) {
    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_CLOCK, &reg) != ADS131M0x_OK) return ADS131M0x_ERROR;
    reg &= ADS131M0x_CLOCK_PWR_MASK;
    reg |= mode;
    return ADS131M0x_WriteRegister(handle, ADS131M0x_CLOCK, reg);
}

//****GAIN Register Getter & Setter ****//
ADS131M0x_StatusTypeDef ADS131_Gain_SetPGAGain(void *handle, uint8_t channel, uint16_t gain)
{
    if (gain > 7 || channel > 3) return ADS131M0x_ERROR;
    return ADS131M0x_Set_GAIN_PGAGAINx(handle, channel, (ADS131M0x_GAIN_PGAGAIN_t)gain);
}

ADS131M0x_StatusTypeDef ADS131_Gain_GetPGAGain(void *handle, uint8_t channel, uint16_t *gain)
{
    if (!gain || channel > 3) return ADS131M0x_ERROR;

    ADS131M0x_GAIN_PGAGAIN_t enumGain;
    ADS131M0x_StatusTypeDef status = ADS131M0x_Get_GAIN_PGAGAINx(handle, channel, &enumGain);
    if (status != ADS131M0x_OK) return status;

    *gain = (uint16_t)enumGain;
    return ADS131M0x_OK;
}

ADS131M0x_StatusTypeDef ADS131M0x_Set_GAIN_PGAGAINx(void *handle, uint8_t channel, ADS131M0x_GAIN_PGAGAIN_t stat)
{
    if (channel > 3 || stat > 7) return ADS131M0x_ERROR;

    uint16_t clear_mask = ~(0x0007 << (channel * 4));
    uint16_t value = stat << (channel * 4);

    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_GAIN, &reg) != ADS131M0x_OK)
        return ADS131M0x_ERROR;

    reg &= clear_mask;
    reg |= value;

    return ADS131M0x_WriteRegister(handle, ADS131M0x_GAIN, reg);
}

ADS131M0x_StatusTypeDef ADS131M0x_Get_GAIN_PGAGAINx(void *handle, uint8_t channel, ADS131M0x_GAIN_PGAGAIN_t *stat)
{
    if (!stat || channel > 3) return ADS131M0x_ERROR;

    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_GAIN, &reg) != ADS131M0x_OK)
        return ADS131M0x_ERROR;

    *stat = (ADS131M0x_GAIN_PGAGAIN_t)((reg >> (channel * 4)) & 0x7);
    return ADS131M0x_OK;
}


//**** CFG Register Getters & Setters ****//
ADS131M0x_StatusTypeDef ADS131_CFG_GetGC_DLY(void *handle, ADS131M0x_CFG_GC_DLY_t *mode) {
    if (!mode) return ADS131M0x_ERROR;
    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_CFG, &reg) != ADS131M0x_OK) return ADS131M0x_ERROR;
    *mode = (ADS131M0x_CFG_GC_DLY_t)(reg & ~ADS131M0x_CFG_GC_DLY_MASK);
    return ADS131M0x_OK;
}

ADS131M0x_StatusTypeDef ADS131_CFG_SetGC_DLY(void *handle, ADS131M0x_CFG_GC_DLY_t mode) {
    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_CFG, &reg) != ADS131M0x_OK) return ADS131M0x_ERROR;
    reg &= ADS131M0x_CFG_GC_DLY_MASK;
    reg |= mode;
    return ADS131M0x_WriteRegister(handle, ADS131M0x_CFG, reg);
}

ADS131M0x_StatusTypeDef ADS131_CFG_GetGC_EN(void *handle, ADS131M0x_CFG_GC_EN_t *mode) {
    if (!mode) return ADS131M0x_ERROR;
    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_CFG, &reg) != ADS131M0x_OK) return ADS131M0x_ERROR;
    *mode = (ADS131M0x_CFG_GC_EN_t)(reg & ~ADS131M0x_CFG_GC_EN_MASK);
    return ADS131M0x_OK;
}

ADS131M0x_StatusTypeDef ADS131_CFG_SetGC_EN(void *handle, ADS131M0x_CFG_GC_EN_t mode) {
    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_CFG, &reg) != ADS131M0x_OK) return ADS131M0x_ERROR;
    reg &= ADS131M0x_CFG_GC_EN_MASK;
    reg |= mode;
    return ADS131M0x_WriteRegister(handle, ADS131M0x_CFG, reg);
}

ADS131M0x_StatusTypeDef ADS131_CFG_GetCD_ALLCH(void *handle, ADS131M0x_CFG_CD_ALLCH_t *mode) {
    if (!mode) return ADS131M0x_ERROR;
    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_CFG, &reg) != ADS131M0x_OK) return ADS131M0x_ERROR;
    *mode = (ADS131M0x_CFG_CD_ALLCH_t)(reg & ~ADS131M0x_CFG_CD_ALLCH_MASK);
    return ADS131M0x_OK;
}

ADS131M0x_StatusTypeDef ADS131_CFG_SetCD_ALLCH(void *handle, ADS131M0x_CFG_CD_ALLCH_t mode) {
    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_CFG, &reg) != ADS131M0x_OK) return ADS131M0x_ERROR;
    reg &= ADS131M0x_CFG_CD_ALLCH_MASK;
    reg |= mode;
    return ADS131M0x_WriteRegister(handle, ADS131M0x_CFG, reg);
}

ADS131M0x_StatusTypeDef ADS131_CFG_GetCD_NUM(void *handle, ADS131M0x_CFG_CD_NUM_t *mode) {
    if (!mode) return ADS131M0x_ERROR;
    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_CFG, &reg) != ADS131M0x_OK) return ADS131M0x_ERROR;
    *mode = (ADS131M0x_CFG_CD_NUM_t)(reg & ~ADS131M0x_CFG_CD_NUM_MASK);
    return ADS131M0x_OK;
}

ADS131M0x_StatusTypeDef ADS131_CFG_SetCD_NUM(void *handle, ADS131M0x_CFG_CD_NUM_t mode) {
    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_CFG, &reg) != ADS131M0x_OK) return ADS131M0x_ERROR;
    reg &= ADS131M0x_CFG_CD_NUM_MASK;
    reg |= mode;
    return ADS131M0x_WriteRegister(handle, ADS131M0x_CFG, reg);
}

ADS131M0x_StatusTypeDef ADS131_CFG_GetCD_LEN(void *handle, ADS131M0x_CFG_CD_LEN_t *mode) {
    if (!mode) return ADS131M0x_ERROR;
    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_CFG, &reg) != ADS131M0x_OK) return ADS131M0x_ERROR;
    *mode = (ADS131M0x_CFG_CD_LEN_t)(reg & ~ADS131M0x_CFG_CD_LEN_MASK);
    return ADS131M0x_OK;
}

ADS131M0x_StatusTypeDef ADS131_CFG_SetCD_LEN(void *handle, ADS131M0x_CFG_CD_LEN_t mode) {
    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_CFG, &reg) != ADS131M0x_OK) return ADS131M0x_ERROR;
    reg &= ADS131M0x_CFG_CD_LEN_MASK;
    reg |= mode;
    return ADS131M0x_WriteRegister(handle, ADS131M0x_CFG, reg);
}

ADS131M0x_StatusTypeDef ADS131_CFG_GetCD_EN(void *handle, ADS131M0x_CFG_CD_EN_t *mode) {
    if (!mode) return ADS131M0x_ERROR;
    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_CFG, &reg) != ADS131M0x_OK) return ADS131M0x_ERROR;
    *mode = (ADS131M0x_CFG_CD_EN_t)(reg & ~ADS131M0x_CFG_CD_EN_MASK);
    return ADS131M0x_OK;
}

ADS131M0x_StatusTypeDef ADS131_CFG_SetCD_EN(void *handle, ADS131M0x_CFG_CD_EN_t mode) {
    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_CFG, &reg) != ADS131M0x_OK) return ADS131M0x_ERROR;
    reg &= ADS131M0x_CFG_CD_EN_MASK;
    reg |= mode;
    return ADS131M0x_WriteRegister(handle, ADS131M0x_CFG, reg);
}

//*************** THRESHOLD_MSB ***************//
ADS131M0x_StatusTypeDef ADS131_Threshold_GetCD_TH_MSB(void *handle, ADS131M0x_THRSHLD_MSB_CD_TH_MSB_t *mode) {
    if (!mode) return ADS131M0x_ERROR;
    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_THRSHLD_MSB, &reg) != ADS131M0x_OK) return ADS131M0x_ERROR;
    *mode = (ADS131M0x_THRSHLD_MSB_CD_TH_MSB_t)(reg & ~ADS131M0x_THRSHLD_MSB_CD_TH_MSB_MASK);
    return ADS131M0x_OK;
}

ADS131M0x_StatusTypeDef ADS131_Threshold_SetCD_TH_MSB(void *handle, ADS131M0x_THRSHLD_MSB_CD_TH_MSB_t mode) {
    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_THRSHLD_MSB, &reg) != ADS131M0x_OK) return ADS131M0x_ERROR;
    reg &= ADS131M0x_THRSHLD_MSB_CD_TH_MSB_MASK;
    reg |= mode;
    return ADS131M0x_WriteRegister(handle, ADS131M0x_THRSHLD_MSB, reg);
}

//*************** THRESHOLD_LSB ***************//
ADS131M0x_StatusTypeDef ADS131_Threshold_GetCD_TH_LSB(void *handle, ADS131M0x_THRSHLD_LSB_CD_TH_LSB_t *mode) {
    if (!mode) return ADS131M0x_ERROR;
    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_THRSHLD_LSB, &reg) != ADS131M0x_OK) return ADS131M0x_ERROR;
    *mode = (ADS131M0x_THRSHLD_LSB_CD_TH_LSB_t)(reg & ~ADS131M0x_THRSHLD_LSB_CD_TH_LSB_MASK);
    return ADS131M0x_OK;
}

ADS131M0x_StatusTypeDef ADS131_Threshold_SetCD_TH_LSB(void *handle, ADS131M0x_THRSHLD_LSB_CD_TH_LSB_t mode) {
    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_THRSHLD_LSB, &reg) != ADS131M0x_OK) return ADS131M0x_ERROR;
    reg &= ADS131M0x_THRSHLD_LSB_CD_TH_LSB_MASK;
    reg |= mode;
    return ADS131M0x_WriteRegister(handle, ADS131M0x_THRSHLD_LSB, reg);
}

ADS131M0x_StatusTypeDef ADS131_Threshold_GetDCBLOCK(void *handle, ADS131M0x_THRSHLD_LSB_DCBLOCK_t *mode) {
    if (!mode) return ADS131M0x_ERROR;
    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_THRSHLD_LSB, &reg) != ADS131M0x_OK) return ADS131M0x_ERROR;
    *mode = (ADS131M0x_THRSHLD_LSB_DCBLOCK_t)(reg & ~ADS131M0x_THRSHLD_LSB_DCBLOCK_MASK);
    return ADS131M0x_OK;
}

ADS131M0x_StatusTypeDef ADS131_Threshold_SetDCBLOCK(void *handle, ADS131M0x_THRSHLD_LSB_DCBLOCK_t mode) {
    uint16_t reg;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_THRSHLD_LSB, &reg) != ADS131M0x_OK) return ADS131M0x_ERROR;
    reg &= ADS131M0x_THRSHLD_LSB_DCBLOCK_MASK;
    reg |= mode;
    return ADS131M0x_WriteRegister(handle, ADS131M0x_THRSHLD_LSB, reg);
}

//*************** CHx_OCAL / GCAL ***************//
ADS131M0x_StatusTypeDef ADS131_Channel_GetOCAL(void *handle, uint8_t ch, uint32_t *ocal) {
    if (!ocal || ch > 3) return ADS131M0x_ERROR;
    uint16_t msb, lsb;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_CH0_OCAL_MSB + (ch * 4), &msb) != ADS131M0x_OK) return ADS131M0x_ERROR;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_CH0_OCAL_LSB + (ch * 4), &lsb) != ADS131M0x_OK) return ADS131M0x_ERROR;
    *ocal = ((uint32_t)msb << 16) | lsb;
    return ADS131M0x_OK;
}

ADS131M0x_StatusTypeDef ADS131_Channel_SetOCAL(void *handle, uint8_t ch, uint32_t ocal) {
    if (ch > 3) return ADS131M0x_ERROR;
    uint16_t msb = (uint16_t)(ocal >> 16);
    uint16_t lsb = (uint16_t)(ocal & 0xFFFF);
    if (ADS131M0x_WriteRegister(handle, ADS131M0x_CH0_OCAL_MSB + (ch * 4), msb) != ADS131M0x_OK) return ADS131M0x_ERROR;
    if (ADS131M0x_WriteRegister(handle, ADS131M0x_CH0_OCAL_LSB + (ch * 4), lsb) != ADS131M0x_OK) return ADS131M0x_ERROR;
    return ADS131M0x_OK;
}

ADS131M0x_StatusTypeDef ADS131_Channel_GetGCAL(void *handle, uint8_t ch, uint32_t *gcal) {
    if (!gcal || ch > 3) return ADS131M0x_ERROR;
    uint16_t msb, lsb;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_CH0_GCAL_MSB + (ch * 4), &msb) != ADS131M0x_OK) return ADS131M0x_ERROR;
    if (ADS131M0x_ReadRegister(handle, ADS131M0x_CH0_GCAL_LSB + (ch * 4), &lsb) != ADS131M0x_OK) return ADS131M0x_ERROR;
    *gcal = ((uint32_t)msb << 16) | lsb;
    return ADS131M0x_OK;
}

ADS131M0x_StatusTypeDef ADS131_Channel_SetGCAL(void *handle, uint8_t ch, uint32_t gcal) {
    if (ch > 3) return ADS131M0x_ERROR;
    uint16_t msb = (uint16_t)(gcal >> 16);
    uint16_t lsb = (uint16_t)(gcal & 0xFFFF);
    if (ADS131M0x_WriteRegister(handle, ADS131M0x_CH0_GCAL_MSB + (ch * 4), msb) != ADS131M0x_OK) return ADS131M0x_ERROR;
    if (ADS131M0x_WriteRegister(handle, ADS131M0x_CH0_GCAL_LSB + (ch * 4), lsb) != ADS131M0x_OK) return ADS131M0x_ERROR;
    return ADS131M0x_OK;
}

SPI_IO_nRF.hads131m0x.hads131_reg_defs.h