The sfdp-dfp in the Device Tree is not being applied.

I set the parameters read from the Flash memory into sfdp-dfp in the Device Tree, but the Read command does not work correctly.
Although I set the wait cycle for read operations to 10 cycles in sfdp-dfp, it seems that the microcontroller is using 6 cycles when reading.
Currently, I am using the "nrf_qspi_nor.c" QSPI driver and the Zephyr RTOS.
sdk version is v2.6.1.
The Flash memory connected to the microcontroller is MX25U51245G, and the read command is 0xEB.

When I checked the source code of nrf_qspi_nor.c, I could not find any code that refers to sfdp-dfp.
In this development environment, does setting sfdp-dfp have no effect?
If it is possible to apply the setting, please let me know how to do it.

device tree settings is below.

&qspi {
    status = "okay";
    pinctrl-0 = <&qspi_default>;
    pinctrl-1 = <&qspi_sleep>;
    pinctrl-names = "default", "sleep";
    ext_flash: mx25u51245g@0 {
        compatible = "nordic,qspi-nor";
        reg = <0>;
        writeoc = "pp4io";
        readoc = "read4io";
        sck-frequency = <48000000>;
        jedec-id = [c2 95 3A];
        size = <536870912>;
        sfdp-bfp = [
            e5 20 fd ff  ff ff ff 1f  48 eb 0a 6b  0a 3b 0a bb
            fe ff ff ff  ff ff 00 ff  ff ff 48 eb  0c 20 0f 52
            10 d8 00 ff  87 49 b5 00  82 d2 04 e2  44 03 67 38
            30 b0 30 b0  f7 bd d5 5c  4a 9e 29 ff  f0 10 c0 c0
        ];
        has-dpd;
        t-enter-dpd = <10000>;
        t-exit-dpd = <30000>;
        address-size-32;
    };
};
red mark is read command(0xEB) & wait cycle(0x48).

best regards.
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  • You may wanna read the PS (7.25.9) - the QSPI peripherial is picky about command instruction bytes and not programmable in this regard. Your chip may or may not be incompatible.

    And yes, the driver won't care about sfdp-bfp stuff here. It can't use it much.

  • Thank you for your reply.

    Is there a way to change the dummy cycles to 6 cycles?
    If it is not possible to adjust the parameters on the microcontroller side, we will need to adjust the number of dummy cycles on the Flash side. In that case, I think it would be necessary to customize the device driver(nrf_qspi_nor.c). What do you think?
    First of all, there is no API implemented to read the Configuration Register on nrf_qspi_nor.c. There is also no method available to write to it.

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  • Thank you for your reply.

    Is there a way to change the dummy cycles to 6 cycles?
    If it is not possible to adjust the parameters on the microcontroller side, we will need to adjust the number of dummy cycles on the Flash side. In that case, I think it would be necessary to customize the device driver(nrf_qspi_nor.c). What do you think?
    First of all, there is no API implemented to read the Configuration Register on nrf_qspi_nor.c. There is also no method available to write to it.

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