[Zephyr] Suggestion on removing nrf7002 dts binding file QSPI on-bus label

[rolandash]

Dear Nordic,

Currently nrf7002 dts binding file for QSPI bus has an 'QSPI' label inside for [compatible, on-bus] scheme matching, This may cause problem on non-NRF host MCU, because 'QSPI' is not really a standard name as 'SPI' among different host MCU families, which in the end may result in the failure of the binding process. 

For example, on stm32 processor, QSPI is regarded as a special 'spi' bus controller, any device node (like nrf7002) on this QSPI bus is resolved into something like 'node_name@spi'. It is obvious that Zephyr device tree binding tool will fail to match the name, and all properties under the node are missed in generated device tree file.

It is suggested to remove the 'QSPI' label in dts binding file, because the [compatible, on-bus] matching scheme only put formal constrains and does mot mean anytihing during real runtime. On the other hands, as 'SPI' is a real 'standard' name, it is actually recommended to put a 'SPI' label in 7002's dts binding file for SPI bus.

Thank you for your attention to this issue.

/Roland

[Elfving]

Thanks for the suggestion! I've forwarded this to the relevant team.

Regards,

Elfving

[rolandash]

Thank you Elfving .

Expecting feedback from the team soon.

/Roland

[Elfving]

I agree with your line of thinking when it comes to this improvement request, though it might be that the relevant R&D team won't be able to consider this change immediately, as it is not a bug per se. If you want this to get a priority, please contact your local regional sales manager about it.

Regards,

Elfving

[rolandash]

It is a bug, because otherwise on stm32 mcu it even can not compile when using QSPI interface with nrf7002.  'Suggestion' is another more gentle way to express the same thing.

Anyway, if your R&D team does not care about it then just forget it as nothing happened.

/Roland

[Elfving]

rolandash said:

Anyway, if your R&D team does not care about it then just forget it as nothing happened.

We always care, the question is just about how quickly we'll be able to address it. Got a bit of a response back here.

rolandash said:

It is a bug, because otherwise on stm32 mcu it even can not compile when using QSPI interface with nrf7002.

The nRF7002 QSPI should only be used with NRF devices (like you say QSPI is not standard, it’s tied to vendor), the QSPI driver (zephyr/modules/nrf_wifi/bus/qspi_if.c at main · zephyrproject-rtos/zephyr ) doesn’t work with non-NRF devices. So, you should be using nrf7002-spi binding for STM32, though the underlying bus might be QSPI.

Regards,

Elfving

[rolandash]

Thank you Elfving , for the effort and the feedback. I appreciate that.

Unfortunately the suggested method in the feedback does not work along with the structure of the current driver. The SPIM part of the driver code is bonded to standard SPI driver interfaces of Zephyr OS, which means if this interface was changed to other type of protocol then all other standard SPI peripherals on other SPI buses will be broke. The driver code still needs to be hacked before the system can work, and not to mention that this may further confuse people on what exactly does 'SPI' means from logical level.

The purpose of this post is not looking for any instant hot fix or likewise. I understand Nordic is providing these for free and I really appreciate that. Since Nordic already mentioned about non-NRF host mcu support in commitments of this driver, I assume the intention was to enable nrf's wifi on different platforms as possible, which in my view is great and will benefit everyone in overall effects. 

If my understanding of the intention is correct, then please take the suggestion in this post into consideration before the next update to the driver. Although developers can hack the driver code as they want in their customized repo, but it may not worth doing that only for a driver compatibility problem to maintain another dedicated branch/repo for it. The eco-system has been already fragmented too much.

/Roland

[Elfving]

Understood. Thanks for the suggestion, I understand that this can be both confusing for those not using a nordic MCU, as well potentially problematic. We'll consider this.

Regards,

Elfving

[Joey Wang]

I’m currently working on the STM32H757I together with the nRF7002.

We are still facing the same issue with the QSPI configuration. Have you been able to resolve this QSPI problem on your side?

It would be great if you could provide some guidance.

MCU: STM32H757I
Wi-Fi Module: nRF7002
IDE: Zephyr SDK

Right now, my DTS is configured in SPI mode, but I want to switch it to QSPI mode.

/* Configure SPI1 for high-speed nRF7002 communication (for h757 board) */
&spi1 {
	
    status = "okay";
	//pinctrl-0 = <&spi1_sck_pg11 &spi1_miso_pg9 &spi1_mosi_pd7 &spi1_nss_pg10>;
	pinctrl-0 = <&spi1_sck_pg11 &spi1_miso_pg9 &spi1_mosi_pd7>;
	pinctrl-names = "default";
	cs-gpios = <&gpiog 10 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; // NSS PG10

	dmas = <&dmamux1 3 38 0x20440>,  // 0x20440 
	       <&dmamux1 2 37 0x20480>;   // 0x20480
	dma-names = "tx", "rx";

	/* High speed SPI configuration for STM32H7 */
	clock-frequency = <DT_FREQ_M(8)>; /* 50MHz SPI clock */
	status = "okay";

	nrf70: nrf7002-spi@0 {
		compatible = "nordic,nrf7002-spi";
		status = "okay";
		reg = <0>;
		spi-max-frequency = <DT_FREQ_M(8)>; /* Increased from 8MHz to 16MHz */

		/* Control GPIOs - using available pins that don't conflict */
		iovdd-ctrl-gpios = <&gpioj 8 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* D0 */
		bucken-gpios = <&gpioj 9 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;     /* D1 */
		host-irq-gpios = <&gpioj 10 GPIO_ACTIVE_HIGH>;                     /* D7 */
		
		/* List of interfaces */
		wlan0: wlan0 {
			compatible = "nordic,wlan";

		};
		
		/* Wi-Fi TX power limits */
		wifi-max-tx-pwr-2g-dsss = <21>;
		wifi-max-tx-pwr-2g-mcs0 = <16>;
		wifi-max-tx-pwr-2g-mcs7 = <16>;
		wifi-max-tx-pwr-5g-low-mcs0 = <13>;
		wifi-max-tx-pwr-5g-low-mcs7 = <13>;
		wifi-max-tx-pwr-5g-mid-mcs0 = <13>;
		wifi-max-tx-pwr-5g-mid-mcs7 = <13>;
		wifi-max-tx-pwr-5g-high-mcs0 = <12>;
		wifi-max-tx-pwr-5g-high-mcs7 = <12>;
	};
};

[Elfving]

Hi,

Are you able to set it using the nrf7002-spi binding for STM32, though with the underlying bus being QSPI?

Regards,

Elfving

[Joey Wang]

Hi Elfving,

We set the nRF7002 with website's sample, but only can successfully works on SPI mode, 

looking for the QPSI with DMA mode to reduce the CPU loading when adding others functions.

But it seems not explicitly setting method currently.

GitHub - chshzh/nrf7002ek-diff-hosts: Run Zephyr Wi-Fi samples using nRF7002EK with STM32/NXP chips as host.

Many thanks~

[Elfving]

Joey Wang said:

But it seems not explicitly setting method currently.

Could you expand a bit on this? I am not sure if I understand what you mean here.

[Joey Wang]

Hi Elfving,

When configuring the QSPI using the nrf7002-qspi label in our overlay, we encounter several Kconfig dependency errors (see the attached log). The detailed configuration can be found in stm32h757i_eval_stm32h757xx_m7.overlay.

Is there a recommended method to enable QSPI (with DMA) successfully?

 - NRF70_ON_QSPI (defined at modules/nrf_wifi/bus/Kconfig:22, modules/nrf_wifi/bus/Kconfig:22), with value y, direct dependencies NRF70_BUSLIB || (NRF70_BUSLIB && 0) (value: y), and select condition NRF70_BUSLIB (value: y)
error: Aborting due to Kconfig warnings

#stm32h757i_eval_stm32h757xx_m7.overlay
#include <freq.h>

/ {
	chosen {
		zephyr,wifi = &wlan0;
		zephyr,canbus = &fdcan1;
		zephyr,qspi = &quadspi;
	};
};


/* Disable Ethernet MAC controller */
&mac {
	status = "disabled";
};

/* Disable MDIO interface */
&mdio {
	status = "disabled";
};

&mt25ql512ab1 {
    status = "disabled";
};

&mt25ql512ab2 {
    status = "disabled";
};

&spi1 {
	status = "disabled";
};

// for 757 FDCNA Clock Source setting 80Hz
&pll2 {
	div-m = <5>;
	mul-n = <32>;
	div-p = <1>;
	div-q = <2>;
	div-r = <2>;
	clocks = <&clk_hse>;
	status = "okay";
};

&fdcan1 {
    status = "okay";
 	compatible= "st,stm32h7-fdcan";
    /* 修改 pinctrl */
    //pinctrl-0 = <&fdcan1_rx_pd0 &fdcan1_tx_pd1>;  // for 723 boards pin setting 
	//pinctrl-0 = <&fdcan1_rx_pb8 &fdcan1_tx_pb9>;  // for 757 boards pin setting 
	pinctrl-0 = <&fdcan1_rx_pd0 &fdcan1_tx_pd1>;
    pinctrl-names = "default";

    /* 修改 clock source 或啟用 */
    clocks = <&rcc STM32_CLOCK_BUS_APB1_2 0x00000100>,
             <&rcc STM32_SRC_PLL2_Q FDCAN_SEL(2)>;
			bus-speed = <1000000>;
			bus-speed-data=<8000000>;

    /* 修改 Nominal / Data bitrate 與時序 */
    //bus-speed = <4000000>;          // Nominal baud rate 1 Mbps
	//bus-speed = <2982456>;          // Nominal baud rate 1 Mbps
	//bus-speed-data=<2982456>;
    //bus-speed-data=<4000000>;
    // sjw = <1>;
    // prop-seg = <6>;
    // phase-seg1 = <13>;
    // phase-seg2 = <1>;               // STM32H7 固定 1

    // fd-data-bus-speed = <4000000>;  // Data phase 4 Mbps
    // fd-sjw = <1>;
    // fd-prop-seg = <1>;
    // fd-phase-seg1 = <2>;
    // fd-phase-seg2 = <1>;
};


/* Configure QSPI for high-speed nRF7002 communication (for h757 board) */
&quadspi {
	pinctrl-0 = <&quadspi_clk_pf10 &quadspi_bk1_ncs_pg6 
	             &quadspi_bk2_io0_ph2 &quadspi_bk2_io1_ph3 
				 &quadspi_bk2_io2_pg9 &quadspi_bk2_io3_pg14>;
	pinctrl-names = "default";
	status = "okay";

	nrf70qspi: nrf7002-qspi@0 {
		compatible = "nordic,nrf7002-qspi";
		status = "okay";
		qspi-quad-mode; /* Enable quad mode */
		qspi-cpha;
		qspi-frequency = <DT_FREQ_M(16)>; /* 16MHz QSPI clock */
		reg = <0>;
		/* Control GPIOs - using available pins that don't conflict */
		iovdd-ctrl-gpios = <&gpioj 8 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; 
		bucken-gpios = <&gpioj 9 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;     
		host-irq-gpios = <&gpioj 10 GPIO_ACTIVE_HIGH>;                     
		
		/* List of interfaces */
		wlan1: wlan1 {
			compatible = "nordic,wlan";

		};
		
		/* Wi-Fi TX power limits */
		wifi-max-tx-pwr-2g-dsss = <21>;
		wifi-max-tx-pwr-2g-mcs0 = <16>;
		wifi-max-tx-pwr-2g-mcs7 = <16>;
		wifi-max-tx-pwr-5g-low-mcs0 = <13>;
		wifi-max-tx-pwr-5g-low-mcs7 = <13>;
		wifi-max-tx-pwr-5g-mid-mcs0 = <13>;
		wifi-max-tx-pwr-5g-mid-mcs7 = <13>;
		wifi-max-tx-pwr-5g-high-mcs0 = <12>;
		wifi-max-tx-pwr-5g-high-mcs7 = <12>;
	};
};
//C:\Users\JackLin\limb_string\zephyrproject\zephyr\boards\st\nucleo_h723zg