Best Practice for I2C Pull-up Voltage with Mixed 3.3V and 3.0V Devices

[oriolreverte]

Hello everyone,

I'm working on a design using an nRF SoC and have a question about the correct way to handle I2C pull-up resistors in a mixed-voltage system.

My Setup:

• The main part of my board, including the nRF (which is the I2C master), is powered at 3.3V.

• I have a separate, isolated analog section on the board to avoid noise. This section includes a sensor IC that is powered at 3.0V.

• The I2C bus (SDA/SCL lines) needs to connect the 3.3V nRF to this 3.0V sensor.

My Question: Both the nRF and the sensor are connected to the same I2C bus, which requires pull-up resistors. I'm unsure what the correct voltage is for these pull-ups.

Should the I2C pull-up resistors be connected to the main 3.3V rail or to the analog section's 3.0V rail? What is the standard best practice for this scenario to ensure safe and reliable communication without damaging either component?

Thanks for your help, Oriol

[Simonr]

Hi

I'm not sure I understand why you have set up the GPIOs on the nRF9151 and the I2C t to run at different voltages in your board, can you explain how/why they're connected to different voltage sources. They should generally not be matched to different voltage nets, so that doesn't sound like a good idea.

Note that the nRF9151 has a VDD_GPIO net that can be supplied independently of VDD on the nRF9151 to enable easy matching to signal voltage levels in your PCB design (section 5.2.1 of the nRF9151 datasheet). 

Best regards,

Simon

[oriolreverte]

Hey Simonr! Basically what i mean is if its safe to power the ic at 3v (this scd is just a random example) and then connect the pull ups to 3v3(in this case it would be vdd_gpio from the 9151). Thanks!