quad-enable-requirements = "NONE" does not compile for NRF QSPI driver

Hi,

I'm trying to enable support for MT25QL01GBBB memory on nrF5340DK. Existing flash has been soldered-off, the one from Micron has been soldered-in with two pull-up resistors for P.0.15 and P0.16 lines (QSPI2 and QSPI3).

I can acces memory via SPI, retrieve SFDPD:

*** Booting nRF Connect SDK v3.1.0-6c6e5b32496e ***
*** Using Zephyr OS v4.1.99-1612683d4010 ***
mt25ql@0: SFDP v 1.6 AP ff with 2 PH
PH0: ff00 rev 1.6: 16 DW @ 30
Summary of BFP content:
DTR Clocking supported
Addressing: 3- or 4-Byte
4-KiBy erase: uniform
Support QSPI XIP
Support 1-1-1
Support 1-1-2: instr 3Bh, 1 mode clocks, 7 waits
Support 1-1-4: instr 6Bh, 1 mode clocks, 7 waits
Support 1-2-2: instr BBh, 1 mode clocks, 7 waits
Support 1-4-4: instr EBh, 1 mode clocks, 9 waits
Support 2-2-2: instr BBh, 1 mode clocks, 7 waits
Support 4-4-4: instr EBh, 1 mode clocks, 9 waits
Flash density: 134217728 bytes
ET1: instr 20h for 4096 By; typ 48 ms, max 480 ms
ET2: instr D8h for 65536 By; typ 160 ms, max 1600 ms
ET3: instr 52h for 32768 By; typ 112 ms, max 1120 ms
Chip erase: typ 62464 ms, max 1499136 ms
Byte program: type 15 + 1 * B us, max 360 + 24 * B us
Page program: typ 120 us, max 2880 us
Page program size: 256 By
Suspend: 75h ; Resume: 7Ah
DPD: Enter B9h, exit ABh ; delay 30000 ns ; poll 0x3e
HOLD or RESET Disable: supported
QER: 0
0-4-4 Mode methods: entry 0x2 ; exit 0x03
4-4-4 Mode sequences: enable 0x14 ; disable 0xa
4-byte addressing support: enter 0x36, exit 0x0f6
Soft Reset and Rescue Sequence support: 0x3d
Status Register 1 support: 0x01
size = <1073741824>; // bits
sfdp-bfp = [
        e5 20 fb ff  ff ff ff 3f  29 eb 27 6b  27 3b 27 bb
        ff ff ff ff  ff ff 27 bb  ff ff 29 eb  0c 20 10 d8
        0f 52 00 00  24 4a 99 00  8b 8e 03 e1  ac 01 27 38
        7a 75 7a 75  fb bd d5 5c  4a 0f 82 ff  81 bd 3d 36
        ];
PH1: ff84 rev 1.0: 2 DW @ 80
sfdp-ff84 = [
        ff e7 ff ff  21 dc ff ff
        ];
jedec-id = [20 ba 21];

I can't get it to work with NRF QSPI driver in quad mode (READ4IO, PP4IO). FASTREAD and PP work fine.

My current devicetree is (minus some commented sections for various tests):

&qspi {
	flash_disk: mx25r6435f@0 {};
	/delete-node/ mx25r6435f@0;
	flash_disk: mt25ql01gb@0 {
		compatible = "nordic,qspi-nor";
		reg = <0>;
		writeoc = "pp4io";
		readoc = "read4io";
		sck-frequency = <8000000>;
		jedec-id = [20 ba 21];
		address-size-32;
		quad-enable-requirements = "NONE";
		/*sfdp-bfp = [
			e5 20 fb ff  ff ff ff 3f  29 eb 27 6b  27 3b 27 bb
			ff ff ff ff  ff ff 27 bb  ff ff 29 eb  0c 20 10 d8
			0f 52 00 00  24 4a 99 00  8b 8e 03 e1  ac 01 27 38
			7a 75 7a 75  fb bd d5 5c  4a 0f 82 ff  81 bd 3d 36
		];
		sfdp-ff84 = [
			ff e7 ff ff  21 dc ff ff
		];*/
		size = <0x8000000>;
		has-dpd;
		t-enter-dpd = <10000>;
		t-exit-dpd = <30000>;
	};
	///delete-node/ mt25ql01gb@0;
};

Datasheet does not have any QE bits in status register, SFDPD also returns QER: 0.

So I thought I should set quad-enable-requirements to "NONE" in devicetree.

But that does not link:

/home/maciek/Projects/ESA-PAD/rh-software/external/zephyr/drivers/flash/nrf_qspi_nor.c:615: undefined reference to `qspi_wait_while_writing'
collect2: error: ld returned 1 exit status

Indeed qspi_wait_while_writing function is wrapped by "quad-enable-requirements is other than NONE".

Parents Reply Children
  • Thanks for reply. What is PS? Product Support? You mean I should ask Nordic or there is a link I can check? If so, can you paste it?

  • The the technical manual for the CPU is called "Product Specification" or short PS.

  • Well, it doesn't say anything about supported flash modules. It can send custom instructions, which I guess means it's all up to QSPI driver, rather than the chip, to support external peripheral over QSPI.

    I have some other, more general questions as well, in context of latest released at the time of writing nRF Connect SDK 3.1.1.

    If I'm reading code for driver well, nordic,qspi-nor ignores sfdp-bpf and other sfdp-* properties, right?
    They are for jedec,jesd216 driver?
    That driver jedec,jesd216 can be used as fully functional QSPI driver?
    Or it;s merely a driver trait-of sort that can use to mark in devicetree that given module supports SFDPD (in ex at runtime) for jedec,spi-nor driver?
    Finally, can jedec,spi-nor be used as full-fledged QSPI driver?

  • ''If I'm reading code for driver well, nordic,qspi-nor ignores sfdp-bpf and other sfdp-* properties, right?''

    No, it doesn't. If you have CONFIG_SPI_NOR_SFDP_DEVICETREE set in config, sfdp-bpf and other sfdp-* properties will not be ignored. 

    ''They are for jedec,jesd216 driver?''

     MCU Boot with sysbuild with SPI external flash  

    Yes. nordic,qspi-nor can also utilize these properties when configured to do so.

    ''That driver jedec,jesd216 can be used as fully functional QSPI driver?
    Or it;s merely a driver trait-of sort that can use to mark in devicetree that given module supports SFDPD (in ex at runtime) for jedec,spi-nor driver?
    Finally, can jedec,spi-nor be used as full-fledged QSPI driver?''

    There is much specific information about this.The standard practice is to use nordic,qspi-nor for QSPI peripherals on Nordic SoCs. 

    I will discuss internally and will get back to you when there is an update. 

  • No, it doesn't. If you have CONFIG_SPI_NOR_SFDP_DEVICETREE set in config, sfdp-bpf and other sfdp-* properties will not be ignored.

    You sound quite confident about it but I think you are mistaken.

    CONFIG_SPI_NOR_.. is for jedec,spi-nor driver, not for nordic,qspi-nor driver.

    And compatible = "jedec,spi-nor" cannot be used under qspi devicetree node. Logical, as spi-nor is different driver.

    I can see callback setting only:

    #if defined(CONFIG_FLASH_JESD216_API)
    .sfdp_read = qspi_sfdp_read,
    .read_jedec_id = qspi_read_jedec_id,
    #endif /* CONFIG_FLASH_JESD216_API */
    
    Other drivers do call jesd216_bfp_read_support() to parse command opcodes, nordic,qspi-nor does not.
    Logic analyzer also doesn't show any "enable 32bit addrs" commands being sent, as would have been retrieved from sfdp-bpf property.
    In fact, this is another "problem" - "enter 32bit addressing" command is only sent when enter-4byte-addr devicetree property is defined. I think it should have been sent when "address-size-32" property is set (either from hardcoded default value, devicetree property or SFDPD). But that one can be configured at least.

    I think the nordic,qspi-nor would benefit from being able to define command opcodes for "enabling quad operations". Not all flash modules do that via status register - in ex memory in question MT25QL01GBBB doesn't - we switched to W25Q01JV because of this.

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