How to use GRTC.CC[0] with NRFX?

Hi,

I need to use GRTC channel 0 in a nRF54L15 project.

Channel 0 is special.  It is the channel that the INTERVAL register controls.

`zephyr/boards/nordic/nrf54l15dk/nrf54l_05_10_15_cpuapp_common.dtsi` contains this excerpt:

grtc {
        owned-channels = <0 1 2 3 4 5 6 7 8 9 10 11>;
        /* Channels 7-11 reserved for Zero Latency IRQs, 3-4 for FLPR */
        child-owned-channels = <3 4 7 8 9 10 11>;
        status = "okay";
};


So I was hoping that I could override this declaration in the devicetree,  removing channel 0, which would leave it available for my own use outside of NRFX.

But this doesn't work.  It fails this assertion in `nrfx_grtc.c`:

        NRFX_STATIC_ASSERT(NRFX_GRTC_CONFIG_ALLOWED_CC_CHANNELS_MASK &
                           GRTC_CHANNEL_TO_BITMASK(MAIN_GRTC_CC_CHANNEL));


It seems channel 0 is always used by NRFX.  It is `MAIN_GRTC_CC_CHANNEL` which is `NRF_GRTC_MAIN_CC_CHANNEL` which is hardcoded as "4" for FLPR code and "0" for main processor code.

The nrfx code unilaterally allocates the first channel in `nrfx_grtc_syscounter_start()`.  Additionally `nrfx_grtc_channel_alloc()` allocates the channels in ascending numerical order.

How can I configure a nrfx project to let me use channel 0?

(Previous discussion GRTC Periodic interval + nrfx but this questions isn't answered there.)

Parents Reply Children
No Data
Related