Genereting a PWM signal in Port 0 pin using GPIOTE + TIMERS + DPP

Hi,

I would like to generate a PWM signal specifically on the P0.03 pin of the nRF54L15 using GPIOTE + DPPI + TIMERS.

As far as I’m concerned, Port 0 in nRF54L15 does not have a dedicated PWM peripheral for its pins, but it seems there is a workaround using the peripherals mentioned above.

TIMERS are supposed to be in the PERI PD. I believe I need to initialize two timers: one to handle the “on-time” or duty-cycle duration, and the other to define the PWM period. I also believe I need to connect them through PPIB22 so they can publish events to the LP PD GPIOTE30, which should toggle the P0.03 pin to emulate a PWM signal.

I would appreciate someone could guide me to implement this since I'm not being able to find examples to start with it.

I've seen the GPPI one to one example, yet it does not build for nRF54L15 as it is.

I'm using the nRF Connect SDK 2.9.0.

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  • Hi Pablo, 

    I have tried similar thing before and I think you should be able generate PWM on P0.03 using two PERI TIMERs feeding LP GPIOTE over PPIB so the CPU stays idle. TIMERs live in PERI; P0.03 + LP GPIOTE live in LP. While PWM runs, PERI must stay on. If runtime PM turns it off, disable runtime PM for those TIMER devices 

    CONFIG_NRFX_GPIOTE=y
    CONFIG_NRFX_TIMER0=y 
    CONFIG_NRFX_TIMER1=y 
    CONFIG_NRFX_DPPI=y
    CONFIG_CLOCK_CONTROL=y
    CONFIG_PM_DEVICE=y 

    I do not have a code snippet for it but the logic would be using DPPI/PPIB to fan out two timer compare events to a single GPIOTE task that toggles the pin, so you synthesize PWM edges entirely in hardware. One timer marks the duty edge, the other marks the period wrap; both events hit the same toggle task, so the pin flips high at duty compare and low at period compare. Because the GPIOTE task is subscribed to those published timer events, no CPU intervention is needed after setup

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  • Hi Pablo, 

    I have tried similar thing before and I think you should be able generate PWM on P0.03 using two PERI TIMERs feeding LP GPIOTE over PPIB so the CPU stays idle. TIMERs live in PERI; P0.03 + LP GPIOTE live in LP. While PWM runs, PERI must stay on. If runtime PM turns it off, disable runtime PM for those TIMER devices 

    CONFIG_NRFX_GPIOTE=y
    CONFIG_NRFX_TIMER0=y 
    CONFIG_NRFX_TIMER1=y 
    CONFIG_NRFX_DPPI=y
    CONFIG_CLOCK_CONTROL=y
    CONFIG_PM_DEVICE=y 

    I do not have a code snippet for it but the logic would be using DPPI/PPIB to fan out two timer compare events to a single GPIOTE task that toggles the pin, so you synthesize PWM edges entirely in hardware. One timer marks the duty edge, the other marks the period wrap; both events hit the same toggle task, so the pin flips high at duty compare and low at period compare. Because the GPIOTE task is subscribed to those published timer events, no CPU intervention is needed after setup

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