Clarification on Port 2 GPIO behavior on nRF54L15 (BM15M module) when using SPIM00 in Zephyr

[abvio]

I am bringing up a custom board using the nRF54L15 (Fanstel BM15M module) and I am using SPIM00 as the high-speed SPI interface. I am configuring the peripheral through Zephyr (NCS 2.x) using the pinctrl mechanism. While doing this, I encountered unexpected behavior on several Port 2 pins when attempting to use them as general-purpose GPIO. I would like to confirm my understanding of the restrictions on Port 2 when SPIM00 is in use.

Summary of observations

• Initially I assigned several display control signals (DISP_RESET, DISP_SPI_RS, etc.) to Port 2 pins, including P2.00 and P2.09.

• When I configured these pins as GPIO outputs in Zephyr and attempted to toggle them, the electrical behavior was not reliable:

  • P2.09 appeared stuck low even though the firmware was driving it as a GPIO.

  • P2.00 showed some transitions, but did not behave as cleanly or predictably as Port 1 pins when toggled.

• I verified these behaviors on the bench using a scope.

Based on the documentation, the HS-SPI (SPIM00) signals use the following Port 2 pins:

• P2.05 – SPIM00 CSN

• P2.06 – SPIM00 SCK

• P2.08 – SPIM00 MOSI

• P2.09 – SPIM00 MISO

Given the behavior I observed, I theorized that general-purpose signals (RESET, D/C, etc.) should not be placed on Port 2 when SPIM00 is enabled in Zephyr.

Questions for Nordic

1. Is it correct that Port 2 pins are effectively reserved for high-speed SPIM00/QSPI functions on the nRF54L15? Are there routing or electrical reasons why these pins should not be used as general-purpose GPIO while SPIM00 is active?

2. Is the behavior I observed on P2.09 (stuck low when configured as GPIO) expected given that it is also the SPIM00 MISO pin?

3. Is P2.00 safe to use as a normal GPIO at the same time SPIM00 is enabled on the other Port 2 pins, or is it best practice to avoid using P2.00 for GPIO as well?

4. In general, is it best practice on nRF54L15 to reserve all of Port 2 exclusively for SPIM00, and place all other control signals on Port 0 or Port 1?

Current Configuration

I have now migrated all non-SPI functions to Port 0 or Port 1, leaving Port 2 exclusively for SPIM00.  I would like confirmation from Nordic that this is the recommended approach for the HS-SPI domain.

Any clarification on intended Port 2 usage would be very helpful before I finalize my next hardware revision.

Thanks,

Steve

[Einar Thorsrud]

Hi Steve,

Is it correct that Port 2 pins are effectively reserved for high-speed SPIM00/QSPI functions on the nRF54L15? Are there routing or electrical reasons why these pins should not be used as general-purpose GPIO while SPIM00 is active?

I do not see a problem with using pins on P2 as GPIOs while other pins on that port are used for high speed peripherals. As stated in the SPIM documentation in the datasheet: "Only one peripheral can be assigned to drive a GPIO pin at a time. If more than one peripheral is assigned to a GPIO pin, it could result in unpredictable behavior."

Is the behavior I observed on P2.09 (stuck low when configured as GPIO) expected given that it is also the SPIM00 MISO pin?

You cannot configure the same pin for use both with SPIM00 (or any other peripheral for that matter), and as GPIO. Can you please clarify what you are doing here, and make sure it is only used for one thing? Also note that if you have used the DK board files as reference P2.09 is connected to a LED and used as a GPIO output there, so it worth making sure you do not have a conflict in your board configuration.

Is P2.00 safe to use as a normal GPIO at the same time SPIM00 is enabled on the other Port 2 pins, or is it best practice to avoid using P2.00 for GPIO as well?

It is safe as long as DCX has not been enabled. You can verify this by reading back the value of PSEL.DCX using a debugger (for SPIM00 this can be done with "nrfutil device read --address 0x5004A60C --direct").

In general, is it best practice on nRF54L15 to reserve all of Port 2 exclusively for SPIM00, and place all other control signals on Port 0 or Port 1?

Generally, you want to use pins in the same power domain as the peripheral connected to them if possible (and if not, you must adhere to the limitations described under Cross power-domain use). P2 also has a limitation that there is no GPIOTE, so you cannot have GPIO interrupts on this port nor control pins on P2 with DPPI. So there are significant limitations. But other than that, for pins that are controlled (read or written to) directly by software, it is OK to use pins on P2 as GPIOs.