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Nordic Case Info
  • Case ID: 355091
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Not able to access debug port via jlink

Nagari Gopal

nrfjprog -c 125 --recover --log
[error] [ Client] - Encountered error -102: Command connect_to_emu_with_snr executed for 406 milliseconds with result -102
ERROR: Unable to connect to a debugger.
[error] [ Worker] - An unknown error.
ERROR: JLinkARM DLL reported an error. Try again. If error condition
ERROR: persists, run the same command again with argument --log, contact Nordic
ERROR: Semiconductor and provide the generated log.log file to them.

0333.log.log

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    Hi, I checked your log file and it shows J-Link debugger itself is detected and configured correctly But when it tries to access the nRF53 debug port, all debug port register writes fail with -1, and JLINK_IsConnected() reports that the probe is not connected to a valid target. This indicates that the PC to J Link path is fine, but the J-Link cannot communicate with the nRF53’s debug port at all.

    That is mostly caused by a hardware connection or power issue on the target side. Could you please check the following:

    1. For reliable SWD debugging with J Link, you should power the custom board so that VDD is around 3.0–3.3 V, and connect that same VDD to the debugger’s VTref pin.
    2. Verify SWD wiring (SWDIO, SWDCLK, GND, VTref), connector orientation and no series resistors or level shifters should be on SWD lines.

    Kind Regards,
    Syed Maysum

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  • 0

    Hi, I checked your log file and it shows J-Link debugger itself is detected and configured correctly But when it tries to access the nRF53 debug port, all debug port register writes fail with -1, and JLINK_IsConnected() reports that the probe is not connected to a valid target. This indicates that the PC to J Link path is fine, but the J-Link cannot communicate with the nRF53’s debug port at all.

    That is mostly caused by a hardware connection or power issue on the target side. Could you please check the following:

    1. For reliable SWD debugging with J Link, you should power the custom board so that VDD is around 3.0–3.3 V, and connect that same VDD to the debugger’s VTref pin.
    2. Verify SWD wiring (SWDIO, SWDCLK, GND, VTref), connector orientation and no series resistors or level shifters should be on SWD lines.

    Kind Regards,
    Syed Maysum

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