Greetings,
Using SDK v3.1.1 I've configured 3 PWM outputs using the pwm0-2 modules via a DTS overlay. After reset or power cycle (and prior to making any PWM driver calls), the pwm0 output at P1.15 starts off high while the remaining two outputs are low (P1.14 and P1.07). My hardware requires that all the outputs start off low. I've tried changing the polarity of pwm0 with no effect - P1.15 still starts off high. How do I ensure that all the PWM outputs start off low after a reset or power cycle?
Here's the PWM portions of my DTS overlay:
/ {
pwmheaters {
compatible = "pwm-leds";
pwm0_channel0: pwm0_channel0 {
pwms = <&pwm0 0 PWM_MSEC(100) 0>;
};
pwm1_channel0: pwm1_channel0 {
pwms = <&pwm1 0 PWM_MSEC(100) 0>;
};
pwm2_channel0: pwm2_channel0 {
pwms = <&pwm2 0 PWM_MSEC(100) 0>;
};
};
};
&pwm0 {
status = "okay";
pinctrl-0 = <&pwm0_default>;
/delete-property/ pinctrl-1;
pinctrl-names = "default";
};
&pwm1 {
status = "okay";
pinctrl-0 = <&pwm1_default>;
/delete-property/ pinctrl-1;
pinctrl-names = "default";
};
&pwm2 {
status = "okay";
pinctrl-0 = <&pwm2_default>;
/delete-property/ pinctrl-1;
pinctrl-names = "default";
};
&pinctrl {
pwm0_default: pwm0_default {
group1 {
psels = <NRF_PSEL(PWM_OUT0, 1, 15)>;
};
};
pwm1_default: pwm1_default {
group1 {
psels = <NRF_PSEL(PWM_OUT0, 1, 14)>;
};
};
pwm2_default: pwm2_default {
group1 {
psels = <NRF_PSEL(PWM_OUT0, 1, 7)>;
};
};
};
Thanks,
Dave