If the nRESET is held low of nRF52840, would it shut it down?

[kaushalyasat]

Hi,

What would be the state of SWD/SWCLK be when the nRF52840 is held in RESET mode?

I am thinking if a simple gang programming be implemented by SWD/SWCLK be shared among a group of nRF52840 custom boards and then keeping the nRESET low to shutdown all but one. 

Cheers,

Kaushalya

[Samruddhi Jadhav]

Hello,

In general, holding nRESET low should keep the device in reset. This means the CPU doesn't run your programme and the GPIOs are not actively driven. As long as VDD is present, the device/chip is still powered. It is not completely powered off. During reset, the debug block can still be active and SWD can still  be used. According to our documentation, there is no statement about if SWDIO is guaranteed to be high impedance or inactive while nRESET is held low for nRF52840. They do not mention the method which you are describing or that nRF52840 in reset will never drive SWDIO and disturb the bus so I cannot validate this approach.

Let me know if you have any further questions.

Best Regards,

Samruddhi

[kaushalyasat]

Hi Samruddhi,

Thanks for the quick reply. I also couldn't find the state of SWD interface when chip is in reset state. If it is active, of course this method is not going to work. I will try muxing SWD lines.

Cheers,

Kaushalya