nRF5340 I2S clocking issue – incorrect MCLK frequency

nRF5340 I2S MCLK issue – unable to get 12.288 MHz MCLK for 48 kHz sampling

I am using the nRF5340 SoC and configuring the I2S peripheral as Master to achieve a 48 kHz audio sampling rate with an expected MCLK of 12.288 MHz (256 × 48 kHz).

With my current I2S configuration:

  • LRCLK is correctly measured at 48 kHz

  • SCLK is measured at 3.072 MHz

  • However, when I measure MCLK on the MCK pin, I only see ~100 kHz, which is not the expected value of 12.288 MHz

The I2S data clocks (LRCLK and SCLK) appear to be correct, but the MCLK output frequency is incorrect.

below are the i2s configurations 

   nrfx_i2s_config_t config; // Structure to hold I2S configuration settings
    config.alignment = NRF_I2S_ALIGN_LEFT;      
    config.format = NRF_I2S_FORMAT_I2S;        
    config.mode = NRF_I2S_MODE_MASTER;          
    config.channels = NRF_I2S_CHANNELS_STEREO;  
    config.sample_width = NRF_I2S_SWIDTH_32BIT;
    config.mck_setup = NRF_I2S_MCK_32MDIV5;    
    config.ratio = NRF_I2S_RATIO_256X;  
    config.clksrc        = NRF_I2S_CLKSRC_ACLK;
    config.enable_bypass = true;
     
    config.mck_pin = NRF_I2S_PIN_NOT_CONNECTED; // Master clock pin not connected 12
    config.lrck_pin = NRF_GPIO_PIN_MAP(0, 11);  // NRF_I2S_PIN_NOT_CONNECTED; // Word clock pin not connected
    config.sck_pin = NRF_GPIO_PIN_MAP(0, 8);    // NRF_I2S_PIN_NOT_CONNECTED; // Bit clock pin not connected
    config.sdout_pin = NRF_GPIO_PIN_MAP(0, 9);  // NRF_I2S_PIN_NOT_CONNECTED; //NRF_GPIO_PIN_MAP(1,14); // Serial data output pin
    config.sdin_pin = NRF_GPIO_PIN_MAP(0, 10);  // Serial data input pin
    config.irq_priority = 2;
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  • Hi, 

    For 12.288 MHz you would be right in using bypass. 

    Why is config.mck_pin = NRF_I2S_PIN_NOT_CONNECTED?

    Are you using the DK? Are you seeing the other configuration examples working for you?

    Regards,

    Elfving

  • Apologies for the confusion caused by my previous post.

    I’d like to clarify that the I2S configuration I initially uploaded was incorrect. Due to an unexpected disturbance from a colleague at the time of posting, I accidentally shared the wrong configuration.

    I have now uploaded the correct I2S configuration that I am currently using, and this configuration has been tested.

        config.alignment = NRF_I2S_ALIGN_LEFT;      
        config.format = NRF_I2S_FORMAT_I2S;        
        config.mode = NRF_I2S_MODE_MASTER;        
        config.channels = NRF_I2S_CHANNELS_STEREO;  
        config.sample_width = NRF_I2S_SWIDTH_32BIT;
        config.mck_setup = NRF_I2S_MCK_32MDIV10;   // when bypass is enabled mck setup ignored 
        config.ratio = NRF_I2S_RATIO_256X;  
        config.clksrc        = NRF_I2S_CLKSRC_ACLK;  
        config.enable_bypass = true;
       
        config.mck_pin = NRF_GPIO_PIN_MAP(0, 12);
        config.lrck_pin = NRF_GPIO_PIN_MAP(0, 11);  
        config.sck_pin = NRF_GPIO_PIN_MAP(0, 8);    
        config.sdout_pin = NRF_GPIO_PIN_MAP(0, 9);  
        config.sdin_pin = NRF_GPIO_PIN_MAP(0, 10);  
        config.enable_bypass = true;  
        config.irq_priority = 2;

     

    With this configuration, I measured the I2S clocks and observed the following:

    • LRCLK is running at 48 kHz, which matches the expected sampling frequency.

    • SCLK is running at 3.072 MHz, which is also as expected.

    • However, the MCLK is measured at approximately 100 kHz, which is not the expected value.

    Could you please help me understand why the MCLK frequency is incorrect, even though LRCLK and SCLK are generated correctly with this configuration?

    Thank you for your support.

  • Understood. No problem Slight smile 

    Elfving said:

    Could you answer these two questions?

    Regards,

    Elfving

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