Simultaneous sQSPI and SPIM00 operation on nrf54L15 & nrf54LM20

[markuckermann]

We are developing a product with fast flash access and a screen so would like to use SPIM00 and the sQSPI simultaneously. The datasheets & documentation are somewhat confusing on this point though.

For the L15:
Does the datasheet mean the QSPI SCK and the SPIM SCK have to share the same pin?

But the documentation on the sQSPI limitations only mention the CSN pin:
https://docs.nordicsemi.com/bundle/ncs-3.0.2/page/nrfxlib/softperipheral/doc/sQSPI/limitations.html

Which in the datasheet is also the SPIM CSN


For the LM20
The datasheet makes no mention of the sQSPI CLK pin being dedicated

But does for the CS:


However there are several SPIM00.CSN mentioned (P2.05 or P2.10) for example and also SPIM00 is not mentioned in the table of peripherals:




Questions:

1. Is there any way to currently run sQSPI and SPIM00 simultaneously on the L15 OR the LM20?
2. If not, is this a fundamental hardware restriction? Will future sQSPI be able to use different pin assignments?
   
3. If not, is it feasible for us to write our own sQSPI implementation that uses different pins?
   
4. Can we see the source code for soft peripherals (sQSPI and sEMMC)?
   

For reference, this is our current best attempt or LM20:

[Priyanka]

Hi Mark,

Checking this internally and will update you.

-Priyanka

[markuckermann]

Thanks! Our current position is that it is not possible on L15 but ought to be on LM20. Seems like SPIM00 on LM20 can be configured to use a small selection of dedicated pins while the SMP00 on L15 just has the set ones. All questions above are still relevant though so looking forward to hearing what you can find out.
Mark

[Priyanka]

HI Mark,

I am yet to hear from the team and will get back to you as soon as I have the information.

-Priyanka

[Priyanka]

Hi Mark,

For nRF54L15, SPIM00 is mapped on two sets of pins.

• The first set (P2.00-P2.05) is shared with sQSPI (e.g. SPIM00 and sQSPI shares pins).
• The second set (P2.06-P2.10) is separate, and allows sQSPI and SPIM00 to be used independently from each other.

So we would suggest you to use SPIM00 on pins P2.06-P2.10 to avoid conflict with sQSPI (sQSPI running on pins P2.00-P2.05).

-Priyanka

[markuckermann]

Hi Priyanka, thanks for this.

Did you mean to say nRF54L15? What you describe, according to our understanding of the datasheets applies to the LM20 and not the L15.

If so, can you confirm the situation on the nRF54LM20? What about my other questions regarding sQSPI pin assignments and source code?

Thanks,
Mark

[Priyanka]

Hi Mark,

If not, is this a fundamental hardware restriction? Will future sQSPI be able to use different pin assignments?

No, this will be locked.

If not, is it feasible for us to write our own sQSPI implementation that uses different pins?

You can look at the https://docs.nordicsemi.com/bundle/ncs-latest/page/nrf/applications/hpf/mspi/README.html, but I'm not sure if this allows to change pins or not.

Can we see the source code for soft peripherals (sQSPI and sEMMC)?

No, this is not available for the public.

-Priyanka