Layer stack up for nPM1300

Hi I would kindly ask what is the recommended layer stack up for npm1300 PMIC.

In reference designs 4 layer board with 2 internal ground planes is used. Looking at the docs it is not stated firmly to use 2 planes (https://docs.nordicsemi.com/bundle/nwp_050/page/WP/nwp_050/pcb_stackup.html).
So my question is if it is okay when having lack of space to go sgn(t)-gnd-pwr-sgn(b)? If so should I be cautious about something? Like not splitting the power plane in middle? Can the i2c or QSPI be also routed on bottom side?

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  • Hi,

    would kindly ask what is the recommended layer stack up for npm1300 PMIC.

    Most critical is having solid GND plane as second layer. 3rd layer can be used for power routing.

    Also note that we do reviews so when you have a design ready feel free to create a ticket named "Review Request" or something alike and add some details about the product, share the layout and schematic files, GERBER, PDF's or Altium or KiCad files are all ok. You can make it either public or private as you prefer. 

    Regards,
    Jonathan

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  • Hi,

    would kindly ask what is the recommended layer stack up for npm1300 PMIC.

    Most critical is having solid GND plane as second layer. 3rd layer can be used for power routing.

    Also note that we do reviews so when you have a design ready feel free to create a ticket named "Review Request" or something alike and add some details about the product, share the layout and schematic files, GERBER, PDF's or Altium or KiCad files are all ok. You can make it either public or private as you prefer. 

    Regards,
    Jonathan

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