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Can it be confirmed that these registers will not be manipulated by the protocol stack or other parts of the SDK? I am concerned that in certain scenarios (e.g., crashes caused by protocol stack exceptions), the protocol stack or SDK might overwrite these registers, leading to incorrect program judgments after a reset. I am using the S140 protocol stack + nRF52833, with nRF5 SDK . Additionally, I have implemented a bootloader (modified based on the official bootloader) where all operations related to these two registers have been removed, so there is no need to worry about interference from the bootloader. Furthermore, I am not using the official OTA (Over-the-Air) update process.
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Will the default value of these registers be 0x00 after a power-off and subsequent power-on?
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When using the NVIC_system_reset() function, will the values of these two registers be retained as they were before the reset?
- What is the read/write endurance of the NRF_POWER->GPREGRET register? Approximately how many write/erase cycles can it withstand?