High Current Consumption (6.3mA) in System OFF with SQSPI Enabled on nRF54L15

Hi nordic team,
I have tried enabling SQSPI on the system off sample, but the power consumption jumped to 6.3mA in system off mode; I tried to disable the cpulfpr core but couldn't find anything, so I have attached my sample code with system off and sqspi enabled to help identify why the current remains so high.
Regards,

1581.system_off.zip

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  • Hi,

     

    In system off mode, the cores are switched off, and the system should be in sleep mode.

    If you see excessive current draw at this point, I would recommend that you look into your gpio states, specifically the CSN pin in this case. This should be high in idle state.

    Are you testing on a custom board or a nRF54L15-DK?

     

    Kind regards,

    Håkon

  • Could you clarify if you are referring to the CSN (Chip Select) pin? If so, yes, it remains HIGH during System OFF mode.

    I am currently building for the nrf54l15 target, and my custom board uses the same flash IC and the same configuration as the DK.

    For context, this is a custom board. The baseline consumption is 2.6 µA when the flash is not in use, so the 6.3 mA draw appears specifically linked to the SQSPI being enabled.

  • I've attached code and logs. Note that system didn't turned off when I monitored logs.

    SEGGER J-Link V8.96 - Real time terminal output
    SEGGER J-Link V9.6, SN=69652068
    Process: JLinkExe
    *** Booting nRF Connect SDK v3.2.1-d8887f6f32df ***
    *** Using Zephyr OS v4.2.99-ec78104f1569 ***
    [00:00:38.219,070] <inf> system_off: 
    nrf54l15dk system off demo
    [00:00:38.219,078] <inf> system_off: Wakeup from System OFF by GPIO.
    [00:00:38.219,084] <inf> system_off: Retained data not supported
    [00:00:39.111,332] <inf> system_off: Entering system off; press sw0 to restart

    3755.system_off.zip
    Regards,

  • While trying to fix this, could you also let me know whether it’s better practice to switch off ICs using the VDD bus rather than using separate grounds?

  • Hi,

     

    Any external logic that is physically turned off, but has traces connected to the nRF GPIOs, needs special attention. These GPIO signals must be low or floating (with input buffer disconnected).

    I see that your external flash is connected to the switched net "GND1" - all connections towards this flash IC must be low/hi-Z if this device is unpowered.

     

    Kind regards,

    Håkon

  • Any external logic that is physically turned off, but has traces connected to the nRF GPIOs, needs special attention. These GPIO signals must be low or floating (with input buffer disconnected).

    Since the CS pin remains high even when the device is physically disconnected, could that indicate that current is being drained through this pin?

    I see that your external flash is connected to the switched net "GND1" - all connections towards this flash IC must be low/hi-Z if this device is unpowered.

    I did try a hardware workaround by breaking the GND1 trace from the flash and reconnecting the flash ground to the main GND, and that worked fine. However, I’m exploring whether this can be handled through firmware instead, as it would make it much easier to program all PCBs consistently.

  • Hi,

     

    Ghazi-Faisal said:

    Since the CS pin remains high even when the device is physically disconnected, could that indicate that current is being drained through this pin?

    Yes, /CSN will backpower the IC.

    MOSI can potentially also source the unpowered flash IC.

     

    Kind regards,

    Håkon

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