Hi,
I'm designing a custom board with the nRF9151, nRF54L15, and nRF7000. I've read in several places that the SPI bus used by the nRF70 series should not be shared with external flash or sensors. However, looking at the Thingy:91 X devicetree (which uses the nRF7002), they all share the same bus.
From thingy 91x, SPI3 (SCK=P0.08, MOSI=P0.09, MISO=P0.10) has three devices with separate CS lines:
| Device | reg | CS pin |
|---|---|---|
| GD25LE255E (flash) | <0> | P0.02 |
| nRF7002 | <1> | P0.11 |
| BMI270 (accel) | <2> | P1.11 |
So all three — flash, nRF7002, and BMI270 — share the exact same SPI bus in the Nordic reference design.
Since the nRF7000 is WiFi scan-only (no TX, no sustained data transfers), I'd expect even less bus contention than the nRF7002 used in the Thingy.
My design uses standard SPI only (not QSPI) for all devices on this bus: nRF7000, external flash, and an IMU. I suspect the "don't share the bus" advice may stem from QSPI configurations where the extra data lines could conflict — but with standard SPI and separate CS lines this should be a straightforward multi-slave setup.
My questions:
-
Can I safely wire external flash, an IMU, and the nRF7000 on the same SPI bus with separate CS lines? Or are there timing/DMA constraints that make this unreliable in practice?
-
Are there any software limitations (e.g., Zephyr SPI bus locking during WiFi scans) that would block access to flash/sensors while the nRF7000 is active?
-
Is there any reason to use two separate SPI peripherals (SPI0 + SPI1) instead of one shared bus, given that we're using standard SPI only (not QSPI)?
I'm in the schematic phase and need to finalize the bus architecture. Any clarification would be appreciated.
Thanks!
Oriol
