nRF7002 interface with STM32 using vanilla Zephyr via QSPI protocol

Subject: Support Request for nRF7002 Integration with ThreadX on STM32

Hello Nordic Team,

We are currently using the nRF7002 with our STM32-based device. We have completed Phase 1 of development using an STM32 MCU, with firmware developed on ThreadX.

For Phase 2, we need to integrate Wi-Fi support using the nRF7002. We would appreciate your support in enabling nRF7002 integration with ThreadX.

Specifically, we would like to know if you can provide drivers or support for the nRF7002 that can be integrated into an existing STM32 project based on ThreadX. This would significantly help us accelerate our development.

Looking forward to your guidance and support.

Best regards,
Sunny Kalyani

Parents Reply Children
  • We have used the vanilla 

    /*
     * Copyright (c) 2023 STMicroelectronics
     *
     * SPDX-License-Identifier: Apache-2.0
     */
    / {
    	chosen {
    		zephyr,wifi = &wlan0;
    	};
    };
    
    &octospi1 {
    	pinctrl-0 = <&octospim_p1_clk_pa3 &octospim_p1_ncs_pa2 &octospim_p1_dqs_pa1
    				 &octospim_p1_io0_pb1 &octospim_p1_io1_pb0 
    				 &octospim_p1_io2_pa7 &octospim_p1_io3_pa6  
    				 &octospim_p1_io4_pc1 &octospim_p1_io5_pc2
    				 &octospim_p1_io6_pc3 &octospim_p1_io7_pc0>;
    
    	pinctrl-names = "default";
    
    	dmas = <&gpdma1 0 7 0x10440>,
    		   <&gpdma1 1 6 0x10480>;
    	dma-names = "tx","rx";
    
    	nrf70: &octospi1 {
    		compatible = "nordic,nrf7002-spi";
    		status = "okay";
    		reg = <0>;
     
    		/* Control GPIOs - using available pins that don't conflict */
    		iovdd-ctrl-gpios = <&gpiob 7 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* D0 */
    		bucken-gpios = <&gpiob 6 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;     /* D1 */
    		host-irq-gpios = <&gpiog 12 GPIO_ACTIVE_HIGH>;                     /* D7 */
    		/* List of interfaces */
    		wlan0: wlan0 {
    			compatible = "nordic,wlan";
    		};
    		/* Wi-Fi TX power limits */
    		wifi-max-tx-pwr-2g-dsss = <21>;
    		wifi-max-tx-pwr-2g-mcs0 = <16>;
    		wifi-max-tx-pwr-2g-mcs7 = <16>;
    		wifi-max-tx-pwr-5g-low-mcs0 = <13>;
    		wifi-max-tx-pwr-5g-low-mcs7 = <13>;
    		wifi-max-tx-pwr-5g-mid-mcs0 = <13>;
    		wifi-max-tx-pwr-5g-mid-mcs7 = <13>;
    		wifi-max-tx-pwr-5g-high-mcs0 = <12>;
    		wifi-max-tx-pwr-5g-high-mcs7 = <12>;
    	};
    
    	status = "okay";
    };
    
    // &spi1 {
    // 	status = "okay";
    // 	pinctrl-0 = <&spi1_sck_pa1 &spi1_miso_pa11 &spi1_mosi_pa12>;
    // 	pinctrl-names = "default";
    // 	cs-gpios = <&gpiod 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
    // 	/* High speed SPI configuration for STM32H7 */
    // 	clock-frequency = <DT_FREQ_M(50)>; /* 50MHz SPI clock */
     
    // 	nrf70: nrf7002-spi@0 {
    // 		compatible = "nordic,nrf7002-spi";
    // 		status = "okay";
    // 		reg = <0>;
    // 		spi-max-frequency = <DT_FREQ_M(8)>; /* Increased from 8MHz to 16MHz */
     
    // 		/* Control GPIOs - using available pins that don't conflict */
    // 		iovdd-ctrl-gpios = <&gpiob 7 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* D0 */
    // 		bucken-gpios = <&gpiob 6 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;     /* D1 */
    // 		host-irq-gpios = <&gpiog 12 GPIO_ACTIVE_HIGH>;                     /* D7 */
    // 		/* List of interfaces */
    // 		wlan0: wlan0 {
    // 			compatible = "nordic,wlan";
    // 		};
    // 		/* Wi-Fi TX power limits */
    // 		wifi-max-tx-pwr-2g-dsss = <21>;
    // 		wifi-max-tx-pwr-2g-mcs0 = <16>;
    // 		wifi-max-tx-pwr-2g-mcs7 = <16>;
    // 		wifi-max-tx-pwr-5g-low-mcs0 = <13>;
    // 		wifi-max-tx-pwr-5g-low-mcs7 = <13>;
    // 		wifi-max-tx-pwr-5g-mid-mcs0 = <13>;
    // 		wifi-max-tx-pwr-5g-mid-mcs7 = <13>;
    // 		wifi-max-tx-pwr-5g-high-mcs0 = <12>;
    // 		wifi-max-tx-pwr-5g-high-mcs7 = <12>;
    // 	};
    // };
    zephyr IDE to interface the NUCLEOU5A5ZJ-Q and nRF7002-DK board.

    NUCLEOU5A5ZJ-Q uses the Octo SPI. And nRF7002 accepts QSPI as the instance while creating the overlay file. Due to this mis-match, the project built is failing. Else the project gets built successfully for the SPI mode.

    Can you guide for this Host MCU interface with nRF7002.

  •  Executing task: west build -b nucleo_u5a5zj_q "d:/Zephyr_IDE-setup/shell" -p --build-dir "d:/Zephyr_IDE-setup/shell/build/nucleo_u5a5zj_q"  -- -DBOARD_ROOT='D:\Zephyr_IDE-setup\external\zephyr'  -DCONFIG_DEBUG_OPTIMIZATIONS=y -DCONFIG_DEBUG_THREAD_INFO=y   
    
    -- west build: making build dir d:\Zephyr_IDE-setup\shell\build\nucleo_u5a5zj_q pristine
    -- west build: generating a build system
    Loading Zephyr default modules (Zephyr base).
    -- Application: D:/Zephyr_IDE-setup/shell
    -- CMake version: 4.3.1
    -- Found Python3: d:/Zephyr_IDE-setup/.venv/Scripts/python.exe (found suitable version "3.13.7", minimum required is "3.10") found components: Interpreter
    -- Cache files will be written to: D:/Zephyr_IDE-setup/external/zephyr/.cache
    -- Zephyr version: 4.2.0 (D:/Zephyr_IDE-setup/external/zephyr)
    -- Found west (found suitable version "1.5.0", minimum required is "0.14.0")
    -- Board: nucleo_u5a5zj_q, qualifiers: stm32u5a5xx
    -- Found host-tools: zephyr 0.17.4 (C:/Users/baps/.zephyr_ide/toolchains/zephyr-sdk-0.17.4)
    -- Found toolchain: zephyr 0.17.4 (C:/Users/baps/.zephyr_ide/toolchains/zephyr-sdk-0.17.4)
    -- Found Dtc: C:/Users/baps/AppData/Local/Microsoft/WinGet/Packages/oss-winget.dtc_Microsoft.Winget.Source_8wekyb3d8bbwe/usr/bin/dtc.exe (found suitable version "1.6.1", minimum required is "1.4.6")
    -- Found BOARD.dts: D:/Zephyr_IDE-setup/external/zephyr/boards/st/nucleo_u5a5zj_q/nucleo_u5a5zj_q.dts
    -- Found devicetree overlay: D:/Zephyr_IDE-setup/shell/nucleo_u5a5zj_q.overlay
    devicetree error: D:/Zephyr_IDE-setup/shell/nucleo_u5a5zj_q.overlay:25 (column 9): parse error: expected node or property name
    CMake Error at D:/Zephyr_IDE-setup/external/zephyr/cmake/modules/dts.cmake:306 (execute_process):
      execute_process failed command indexes:
    
        1: "Child return code: 1"
    
    Call Stack (most recent call first):
      D:/Zephyr_IDE-setup/external/zephyr/cmake/modules/zephyr_default.cmake:131 (include)
      D:/Zephyr_IDE-setup/external/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:66 (include)
      D:/Zephyr_IDE-setup/external/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:92 (include_boilerplate)
      CMakeLists.txt:5 (find_package)
    
    
    -- Configuring incomplete, errors occurred!
    FATAL ERROR: command exited with status 1: 'C:\Program Files\CMake\bin\cmake.EXE' -DWEST_PYTHON=d:/Zephyr_IDE-setup/.venv/Scripts/python.exe '-Bd:\Zephyr_IDE-setup\shell\build\nucleo_u5a5zj_q' -GNinja -DBOARD=nucleo_u5a5zj_q '-DBOARD_ROOT=D:\Zephyr_IDE-setup\external\zephyr' -DCONFIG_DEBUG_OPTIMIZATIONS=y -DCONFIG_DEBUG_THREAD_INFO=y '-Sd:\Zephyr_IDE-setup\shell'

  • Hi

    We don't support octa spi, so you would need to set it to either spi/qspi. From the datasheet of the stm it seems fine to do it

    Regards

    Runar

  • STM32 surly supports QSPI.

    Problem statement: In the STM32 driver the QSPI is with name as Octa SPI and inside that we have a QSPI as operating mode. But while creating nRF7002 node in overlay file, it does not allow to create node for Octo SPI. So can you guide us how to create a nRF7002 node for the STM32 NUCLEOU5A5ZJ-Q which supports Octo SPI.

  • Can you show me how you have connected the boards? The 7002dk has a host cpu(5340) that is connected to the nrf7002) and you will need to modify the solder bridges if you want to use the 7002dk. You can see in this case how it can be done. You can also see the which solder bridges is connected to the 7002 on the silk screen. 
    I'm not familiar with STM devices so I can't say for sure how you need to setup the devicetree for spi there. However I would be surprised  if you can't define it as and is forced to use octospi when the datasheet stated it supported spi

    Regards

    Runar

Related