nRF54L05 SAADC AIN0–AIN2 unstable / affected by TAMPC?

Hello,

I am working with the nRF54L05 and testing SAADC inputs.

I observed the following behavior:

  • AIN4–AIN7 work correctly as ADC inputs
  • AIN0–AIN2 show unstable or saturated readings
  • Example: AIN0 often reads near full scale (~4092), even with defined input
  • Occasionally values change, but not stable or reliable

From the datasheet, I see that:

  • AIN0–AIN2 are also connected to TAMPC (active shield, tamper functions, radio)

My questions:

  1. Are AIN0–AIN2 intended to be used as SAADC inputs in normal applications?
  2. Is TAMPC enabled by default and interfering with SAADC?
  3. Can TAMPC be disabled to allow proper ADC usage on these pins?
  4. Are AIN4–AIN7 the only recommended ADC inputs for reliable operation?

I verified that there is no external circuitry affecting the pins (direct connection to MCU, ~0.3 ohm trace).

Thank you for clarification.

Best regards

Parents
  • Hi,

    On the nRF54L05, the analog input pins (AIN0-AIN5) are shared with the TAMPC active shield, only AIN6 and AIN7 are fully free of TAMPC as shown in the Pin assignment table and the pins reserved for the a TAMPC active shield detector can be used as generic GPIO pins when its channel is unuse, and therefore as SAADC analog inputs. The channels are enabled using the CH[i] fields in the register ACTIVESHIELD.CHEN.

    Although ACTIVESHIELD.CHEN register resets to 0x00000000, meaning all active shield channels are disabled at power-on but you can ensure the relevant TAMPC channels are disabled for any AIN pin shared with TAMPC before using it as an SAADC input. 

    To check whether TAMPC active shield channels are enabled at runtime, you can use the nrfx HAL function:

    nrf_tampc_activeshield_channel_enable_check(NRF_TAMPC, mask);

    This function returns a mask of the currently enabled active shield channels. A return value of 0x00000000 confirms all channels are off.

    Best Regards,
    Syed Maysum

Reply
  • Hi,

    On the nRF54L05, the analog input pins (AIN0-AIN5) are shared with the TAMPC active shield, only AIN6 and AIN7 are fully free of TAMPC as shown in the Pin assignment table and the pins reserved for the a TAMPC active shield detector can be used as generic GPIO pins when its channel is unuse, and therefore as SAADC analog inputs. The channels are enabled using the CH[i] fields in the register ACTIVESHIELD.CHEN.

    Although ACTIVESHIELD.CHEN register resets to 0x00000000, meaning all active shield channels are disabled at power-on but you can ensure the relevant TAMPC channels are disabled for any AIN pin shared with TAMPC before using it as an SAADC input. 

    To check whether TAMPC active shield channels are enabled at runtime, you can use the nrfx HAL function:

    nrf_tampc_activeshield_channel_enable_check(NRF_TAMPC, mask);

    This function returns a mask of the currently enabled active shield channels. A return value of 0x00000000 confirms all channels are off.

    Best Regards,
    Syed Maysum

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