Hi Nordic team,
I am designing a new board from scratch around the nRF52832 in KiCad.
My current plan is to use the nRF52832-QFAA/QFAB QFN48 package on a 2-layer PCB. I am also considering whether it would be better to switch to the nRF52832-CIAA WLCSP package and use a 4-layer PCB instead, but this would be my first custom RF/BLE PCB.
I have two related questions: one about KiCad symbol/power-pin practice for QFN48, and one about whether moving to WLCSP + 4 layers is a good idea for a first design.
- QFN48 VDD pins in KiCad
I am using KiCad’s built-in symbol:
MCU_Nordic:nRF52832-QFxx
From the nRF52832 Product Specification, the QFN48 package has multiple VDD pins:
- Pin 13: VDD
- Pin 36: VDD
- Pin 48: VDD
My understanding is:
- All physical VDD pads must be connected to the same board supply net, for example VDD_nRF.
- I should not physically connect only pad 13 and leave pads 36 and 48 unconnected.
- The decoupling capacitors should be placed close to the actual physical VDD pads during PCB layout.
- In KiCad, it is common for a symbol to show only one visible VDD pin while other VDD pins are hidden or stacked onto the same logical net.
The confusing part is that KiCad’s built-in symbol appears to expose only one VDD connection visibly. When switching to PCB layout, KiCad still expects footprint pads 13, 36, and 48 to be connected, which makes sense electrically, but it is not obvious from the schematic where each VDD pad’s decoupling capacitor should be shown.
So for QFN48:
- Is it acceptable to use the built-in KiCad symbol with stacked/hidden VDD pins, place all VDD decoupling capacitors on the same VDD_nRF net, and handle physical placement near pins 13, 36, and 48 in layout?
- Or would Nordic recommend making a project-local KiCad symbol where VDD pins 13, 36, and 48 are all visible separately, so the schematic can show decoupling near each physical VDD pin?
- Is there an official Nordic KiCad symbol/footprint/reference design for nRF52832 QFN48 that models the VDD pins, DEC pins, DCC, and NC pins in the recommended way?
My current understanding for QFN48 internal DC/DC is:
- DCC pin 47 connects through a 10 uH inductor to DEC4 pin 46.
- DEC4 has 1 uF to GND.
- DEC1 has 100 nF to GND.
- DEC3 has 100 pF to GND.
- DEC2 is not populated / left NC for the QFN48 reference design.
- Pin 44 is NC and should be left unconnected.
Could you confirm whether this is correct for nRF52832 QFN48?
- QFN48 2-layer vs CIAA WLCSP 4-layer
Since this is a compact handheld/wearable-style board, I am also wondering whether I should switch from:
nRF52832-QFAA/QFAB QFN48 on 2 layers
to:
nRF52832-CIAA WLCSP on 4 layers
I understand that the CIAA WLCSP package is much smaller, but I am not sure if it is a better choice for a first-time board.
Could you advise on the practical difficulty difference?
Specific questions:
- For a first custom BLE PCB, would Nordic recommend staying with QFN48 on 2 layers, or is CIAA WLCSP on 4 layers reasonable if the PCB fab/assembler can support it?
- How much harder is the CIAA WLCSP to route compared with QFN48?
For example, does it typically require:
- via-in-pad?
- microvias?
- blind/buried vias?
- very small trace/space rules?
- 0201 passives around the chip?
- special soldermask or assembly constraints?
- Is a 4-layer WLCSP layout actually easier from an RF/power-integrity point of view because of solid ground and power planes, or does the WLCSP escape routing make it significantly riskier than QFN48?
- Are there Nordic layout examples, routing guides, or application notes specifically for routing the nRF52832-CIAA WLCSP package on a 4-layer PCB?
- The product specification mentions WLCSP light sensitivity. For a small consumer device, should this be considered a major practical risk? Is shielding/coating always required, or is enclosure opacity usually enough?
- Are there package-specific differences in RF performance, antenna matching, grounding, or decoupling strategy between QFN48 and CIAA WLCSP that I should be aware of?
- If I stay with QFN48 on 2 layers, is that still a good choice for BLE RF performance, assuming I follow the Nordic reference layout, keep a solid ground plane, and keep the RF section/antenna layout close to the reference design?
My goal is to follow the Nordic reference design electrically while choosing a package and PCB stackup that is realistic for a first custom board. I am comfortable using 4 layers if it makes the design more robust, but I do not want to make the build unnecessarily hard by choosing WLCSP too early.
Any recommended KiCad workflow, symbol style, WLCSP fanout strategy, or example 2-layer vs 4-layer layout guidance would be very helpful.
Thanks!
