I did not get Audio - adc value shows zero all the timse why ??
const codec_register CODEC_DEF_REG_DATA[] = {
// =====================================================
// ===================== PAGE 0 ========================
// =====================================================
{0x00, 0x00}, // Select Page 0
// Software reset
{0x01, 0x01},
// ---------- PLL CONFIG (MCLK = 4 MHz → 8 kHz Fs) ----------
{0x04, 0x03}, // PLL input = MCLK, CODEC_CLK = PLL
{0x05, 0xD4}, // PLL power up, P=5, R=4 D4 or 0x91
{0x06, 0x20}, // J=32
{0x07, 0x00}, // D MSB
{0x08, 0x00}, // D LSB
// ---------- DAC CLOCK TREE ----------
{0x0B, 0x84}, // NDAC=4, power up
{0x0C, 0x99}, // MDAC=25, power up
{0x0E, 0x80}, // DOSR=128 → Fs = 8kHz
{0x12, 0x84}, // NADC=4, power up
{0x13, 0x99}, // MADC=25, power up
{0x14, 0x80}, // AOSR=128
// ---------- I2S DIGITAL ----------
{0x1B, 0x0C}, // I2S, 16bit, BCLK and WCLK are output from device
{0x1D, 0x01}, // DAC clock source 0x01 #bdiv_clkin=dac_mod_clk
{0x1E, 0x84}, // BCLK divider 84 #bclk ndiv powered up, =4
// Set the DAC Mode to PRB_P8
{0x3C, 0x08},
// 4Mhz * (R*j.d)/P
// 4 * 4 * 32 / 5 = 102.4MHz
// /ndac = 102.4/4 -> 25.6MHz = DAC_CLK
// /mdac = 25.6MHz/25 = 1.024MHz = DAC_MOD_CLK
// /dosr = 1.024/128 = 8khz = dac_fs
// dac_mod_clk / 4 = 256kHz = bclk -> (2 channel 16 bit data)
// =====================================================
// ===================== PAGE 1 ========================
// =====================================================
{0x00, 0x01}, // Select Page 1
// Disable Internal Crude AVdd in presence of external AVdd supply or before
// powering up internal AVdd LDO
{0x01, 0x08},
// Enable Master Analog Power Control
{0x02, 0x00},
// Set the REF charging time to 40ms
{0x7B, 0x01},
{0x03, 0x00}, // Playback Configuration Register 1
{0x04, 0x00}, // Playback Configuration Register 2
{0x09, 0x30}, // Output Driver Power Control Register #hpl and hpr powered up, line outs powered down
{0x0A, 0x00}, // Output Driver Power Control Register #avdd supply for hp
{0x0C, 0x08}, // HPL Routing Selection Register #ldac pos terminal routed to hpl
{0x0D, 0x08}, // HPR Routing Selection Register #rdac pos terminal routed to hpr
{0x0E, 0x08}, // Left DAC → LOL #ldac routed to lol
{0x0F, 0x08}, // Right DAC → LOR #rdac routed to lor
{0x10, 0x00}, // HPL Driver Gain Setting Register #hpl driver not muted
{0x11, 0x00}, // HPR Driver Gain Setting Register #hpr driver not muted
{0x14, 0x25}, // Headphone Driver Startup Control Register #HP ramps over 5 time constants, power up determined with 6k
{0x16, 0x00}, // IN1L to HPL Volume Control Register #in1l to hpl volume = 0db (path not set)
// /* ---------- MIC (optional) ---------- */
{0x33, 0x60}, // MIC Bias 2.5v #bias powered up set to 2.5V
{0x34, 0x04}, // Left MICPGA Positive Terminal Input Routing Configuration #in3l routed to left micpa with 10k resistance
{0x36, 0x40}, // Left MICPGA Negative Terminal Input Routing Configuration #cm1l to left neg terminal with 10k
{0x3B, 0x00}, // Left MICPGA Volume Control Register #left micpga gain enabled, 0db
{0x3C, 0x00}, // Right MICPGA Volume Control Register #same for right micpga (nothing connected)
// {0x46, 0x0A}, // MICBIAS = 2.5V
// {0x48, 0x40}, // MICPGA P = MIC 10k
// {0x49, 0x40}, // MICPGA M = CM 10k
// {0x47, 0x00}, // MIC gain = 0dB
// =====================================================
// ===================== PAGE 0 ========================
// =====================================================
{0x00, 0x00}, // Select Page 0
{0x3F, 0xD6}, // Powerup DAC left channel #ldac and rdac powered up
{0x40, 0x00}, // Left & Right channel DAC unmuted
{0x41, 0x00}, // DAC digital gain = 0dB #ldac gain=0db
{0x51, 0x80}, // Powerup ADC C0 #ladc powered up, radc powered down
{0x52, 0x00}, // ADC channel unmuted, 0dB #both ladc and radc unmuted
{0x53, 0x00}, // ADC Digital Volume Control Coarse = 0dB
// =====================================================
// ===================== PAGE 1 ========================
// =====================================================
// {0x00, 0x01}, // Select Page 1
// {0x35, 0x44}, // LDAC and RDAC router to L & R mixer amplifier
// {0x36, 0x80},
// {0x37, 0x80},
// {0x38, 0x80}, // Left Analog Vol to SPR, unmuted
// {0x39, 0x80}, // Right Analog Vol to SPR, unmuted
// {0x42, 0x04}, // Left Speaker gain = 6dB, unmuted
// {0x43, 0x04}, // Left Speaker gain = 6dB, unmuted
// {0x32, 0xC6}, // Speaker drivers power up
};
