nRF5340 (NCS v2.8.0) - External rail-to-rail LFXO source: boot hangs, external oscillator stops toggling

Question

I want to use a new source LF clock to raise the precision from +-250ppm to around +-20ppm. I already have an oscillator mounted in my PCB, so I want to use it for BLE. I need very high precision (<10us), so this would be a great upgrade. The external oscillator is SiT1533 ( SiT1533AI-H4-DCC-32.768D SiTime | Mouser United Kingdom ). The variant only allows for rail-to-rail mode. 
 Setup 
 
 nRF5340, NCS v2.8.0, target nrf5340dk/nrf5340/cpuapp (secure, no TF-M). 
 Sysbuild with hci_ipc netcore image (SDC + MPSL). 
 External rail-to-rail 32.768 kHz clock, ~20 ppm, wired to XL1 only , XL2 floating , no external caps. The source toggles correctly before firmware boots. 
 Use case: BLE controller-time sync, target precision < 10 µs. 
 
 Conflicts: 
 
 XL1 already assigned to spi_heepo MOSI in P0.00. Also, P0.00 attached to an interrupt from an outside sensor. Currently not enabled nor connected. I tried to deactivate both at least in firmware. In HW they doesn't seem to introduce any noisy signal. 
 XL2 already assigned to flash pin, but not really used. In HW it apparently introduces a small signal of around 10mV peak to peak and 32,768 KHz. Could this be a problem? 
 
 Application prj.conf 
 
 CONFIG_CLOCK_CONTROL_NRF_K32SRC_XTAL=y
CONFIG_CLOCK_CONTROL_NRF_K32SRC_20PPM=y
CONFIG_SOC_ENABLE_LFXO=y
CONFIG_SOC_LFXO_CAP_EXTERNAL=y

( _EXT_FULL_SWING was dropped per DRGN-15064.) 
 Netcore sysbuild/hci_ipc.conf — same K32SRC_XTAL + 20PPM to match the app core (per DevZone #120382). 
 BYPASS bit — nrfx HAL helper nrf_oscillators_lfxo_bypass_set() doesn't expand on this SoC (DevZone #111425), so we write the register directly: 
 
 static int lfclk_bypass_full_swing(void) {
 NRF_OSCILLATORS->XOSC32KI.BYPASS = 1;
 return 0;
}
SYS_INIT(lfclk_bypass_full_swing, EARLY, 0); // also tried PRE_KERNEL_1, 0

DT — no lfxo node label in NCS v2.8.0 yet (lands later via Zephyr PR #92664), so we rely entirely on Kconfig. 
 Symptom 
 
 After flashing, the firmware doesn't boot. RTT attaches but no log output → looks like a hang in PRE_KERNEL_1 waiting for LFCLKSTARTED . However, I tried to use EARLY for SYS_INIT without success. 
 On the scope, the external 32.768 kHz signal at XL1 stops toggling after the firmware runs LFXO init. A full power-cycle of the board (not just a debugger reset) is required to bring the external oscillator back. 
 Reverting both cores to K32SRC_RC restores normal boot. 
 
 Questions 
 
 What is the officially supported, race-free way in NCS v2.8.0 to configure an external rail-to-rail 32.768 kHz source on XL1, XL2 floating? 
 Is the recommended workaround to set CONFIG_SOC_ENABLE_LFXO=n and do all four steps ( BYPASS=1 → LFXO_CAP=External → XL1/XL2 MCUSEL=Peripheral ) ourselves in one SYS_INIT at EARLY, 0 ? 
 Any additional netcore Kconfigs needed for MPSL/SDC with an external LFXO source? 
 
 Happy to share full configs, overlay and scope traces.