External OTA related issue (SPI + External Flash + OTA)

Hi Team,

I am working on OTA using an external Winbond flash IC (W25Q64) with the nRF52832 controller in NCS SDK version 2.9.2. I have completed all the required configurations, but I am still facing errors during the OTA process.

Currently, I am testing with a simple connectable beacon application. I am sharing all the related files and RTT logs below. Could you please help me identify what is going wrong in the configuration or implementation?

I have shared the logs and files below:

Logs *** Booting MCUboot v2.1.0-dev-12e5ee106034 ***
*** Using nRF Connect SDK v2.9.0-7787b2649840 ***
*** Using Zephyr OS v3.7.99-1f8f3dc29142 ***
[00:00:00.002,777] <inf> mcuboot: Starting bootloader
[00:00:00.003,082] <err> mcuboot: Failed to open flash area ID 1 (image 0 slot 1): -19, cannot continue

files:

  1. my_crt2.dts

  2. my_crt.overlay

  3. my_crt.dtsi

  4. mcuboot.conf

  5. mcuboot.overlay

Please review them and let me know if there are any issues in the configuration.



my_crt2_dts 

/dts-v1/;
#include <nordic/nrf52832_qfaa.dtsi>
#include "my_crt2-pinctrl.dtsi"

/ {
    model = "Custom Board auto generated by nRF Connect for VS Code";
    compatible = "embel_tech,my-crt2";

    chosen {
        zephyr,sram             = &sram0;
        zephyr,flash            = &flash0;
        zephyr,code-partition   = &slot0_partition;
        nordic,pm-ext-flash     = &w25q64;
    };
};
&spi0 {
    status = "okay";
    compatible = "nordic,nrf-spim";
    pinctrl-0 = <&spi0_default>;
    pinctrl-1 = <&spi0_sleep>;
    pinctrl-names = "default", "sleep";
    cs-gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;

    w25q64: w25q64@0 {
        compatible = "jedec,spi-nor";
        reg = <0>;
        status = "okay";
        spi-max-frequency = <8000000>;
        jedec-id = [ef 40 17];
        size = <0x800000>;
        sfdp-bfp = [
            e5 20 f1 ff  ff ff ff 03
            44 eb 08 6b  08 3b 04 bb
            ee ff ff ff  ff ff 00 ff
            ff ff 00 ff  0c 20 0f 52
            10 d8 00 ff  23 72 f5 00
            82 ed 04 cc  44 83 68 44
            30 b0 30 b0  f7 c4 d5 5c
            00 be 29 ff  f0 d0 ff ff
        ];
        has-dpd;
        t-enter-dpd = <3000>;
        t-exit-dpd  = <30000>;

        partitions {
            compatible = "fixed-partitions";
            #address-cells = <1>;
            #size-cells = <1>;

            slot1_partition: partition@0 {
                label = "image-1";
                reg = <0x00000000 0x00069000>;
            };
        };

    };
    

};
&flash0 {
    partitions {
        compatible = "fixed-partitions";
        #address-cells = <1>;
        #size-cells = <1>;

        boot_partition: partition@0 {
            label = "mcuboot";
            reg = <0x00000000 DT_SIZE_K(48)>;
        };

        slot0_partition: partition@c000 {
            label = "image-0";
            reg = <0x0000c000 0x00069000>;
        };

        storage_partition: partition@75000 {
            label = "storage";
            reg = <0x00075000 DT_SIZE_K(44)>;
        };
    };
};

&gpiote {
    status = "okay";
};

&gpio0 {
    status = "okay";
    gpiote-instance = <&gpiote>;
};

my_crt2_overlay-


/* STEP 2.1 - Add external flash to application */
&w25q64 {
	status = "okay";
};

/ {
	chosen {
		nordic,pm-ext-flash = &w25q64;
	};
};

my_crt_dtsi 


    /* SPI2 - replace pin numbers with your actual pins */
    spi0_default: spi0_default {
        group1 {
            psels = <NRF_PSEL(SPIM_SCK,  0, 30)>,
                    <NRF_PSEL(SPIM_MOSI, 0, 29)>,
                    <NRF_PSEL(SPIM_MISO, 0, 27)>;
        };
    };
    spi0_sleep: spi0_sleep {
        group1 {
            psels = <NRF_PSEL(SPIM_SCK,  0, 30)>,
                    <NRF_PSEL(SPIM_MOSI, 0, 29)>,
                    <NRF_PSEL(SPIM_MISO, 0, 27)>;
            low-power-enable;
        };
    };
};

mcuboot.conf-




# ── Clock (nRF52832 custom board: no 32 kHz XTAL) ───────────────
CONFIG_CLOCK_CONTROL_NRF_K32SRC_XTAL=n
CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC=y


# ── Console (RTT only, no UART on custom board) ──────────────────
CONFIG_SERIAL=n
CONFIG_UART_CONSOLE=n
CONFIG_CONSOLE=y
CONFIG_RTT_CONSOLE=y
CONFIG_USE_SEGGER_RTT=y
CONFIG_LOG=y
CONFIG_LOG_BACKEND_RTT=y

# ── SPI NOR driver (Exercise step 1.2) ──────────────────────────
CONFIG_GPIO=y
CONFIG_SPI=y
CONFIG_SPI_NOR=y
CONFIG_SPI_NOR_SFDP_DEVICETREE=y  
CONFIG_FLASH=y

CONFIG_SPI_NOR_FLASH_LAYOUT_PAGE_SIZE=4096
CONFIG_NORDIC_QSPI_NOR=n
CONFIG_MULTITHREADING=y

# ── nRF52832 PAN-58 (SPIM errata workaround) ────────────────────
CONFIG_SOC_NRF52832_ALLOW_SPIM_DESPITE_PAN_58=y

# ── MCUboot sectors (Exercise step 4) ───────────────────────────
CONFIG_BOOT_MAX_IMG_SECTORS=512



mcuboot.overlay 



&w25q64 {
    status = "okay";
};

/ {
    chosen {
        nordic,pm-ext-flash = &w25q64;
    };
};

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