Hello Nordic Team,
I am currently working with the nRF52832 on a custom board using nRF Connect SDK v2.9.0. I am implementing OTA DFU using Sysbuild and MCUboot with an external Winbond W25Q64 SPI flash device.
I have followed the official Nordic documentation and completed all the configuration steps
I have shared the logs and configuration below:
Logs *** Booting MCUboot v2.1.0-dev-12e5ee106034 ***
*** Using nRF Connect SDK v2.9.0-7787b2649840 ***
*** Using Zephyr OS v3.7.99-1f8f3dc29142 ***
[00:00:00.002,777] <inf> mcuboot: Starting bootloader
[00:00:00.003,082] <err> mcuboot: Failed to open flash area ID 1 (image 0 slot 1): -19, cannot continue
configuration-
my_custom dts-
/dts-v1/;
#include <nordic/nrf52832_qfaa.dtsi>
#include "my_nag-pinctrl.dtsi"
/ {
model = "Custom Board auto generated by nRF Connect for VS Code";
compatible = "embeltech,my-nag";
chosen {
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
nordic,pm-ext-flash = &w25q64;
};
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 DT_SIZE_K(48)>;
};
slot0_partition: partition@c000 {
label = "image-0";
reg = <0x0000c000 DT_SIZE_K(220)>;
};
storage_partition: partition@43000 {
label = "storage";
reg = <0x00043000 DT_SIZE_K(24)>;
};
};
};
&spi0 {
status = "okay";
compatible = "nordic,nrf-spim";
pinctrl-0 = <&spi0_default>;
pinctrl-1 = <&spi0_sleep>;
pinctrl-names = "default", "sleep";
cs-gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;
w25q64: w25q64@0 {
compatible = "jedec,spi-nor";
reg = <0>;
status = "okay";
spi-max-frequency = <8000000>;
jedec-id = [ef 40 17];
size = <0x4000000>;
sfdp-bfp = [
e5 20 f1 ff ff ff ff 03
44 eb 08 6b 08 3b 04 bb
ee ff ff ff ff ff 00 ff
ff ff 00 ff 0c 20 0f 52
10 d8 00 ff 23 72 f5 00
82 ed 04 cc 44 83 68 44
30 b0 30 b0 f7 c4 d5 5c
00 be 29 ff f0 d0 ff ff
];
has-dpd;
t-enter-dpd = <3000>;
t-exit-dpd = <30000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
slot1_partition: partition@0 {
label = "image-1";
reg = <0x00000000 DT_SIZE_K(220)>;
};
};
};
};
/dts-v1/;
#include <nordic/nrf52832_qfaa.dtsi>
#include "my_nag-pinctrl.dtsi"
/ {
model = "Custom Board auto generated by nRF Connect for VS Code";
compatible = "embeltech,my-nag";
chosen {
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
nordic,pm-ext-flash = &w25q64;
};
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 DT_SIZE_K(48)>;
};
slot0_partition: partition@c000 {
label = "image-0";
reg = <0x0000c000 DT_SIZE_K(220)>;
};
storage_partition: partition@43000 {
label = "storage";
reg = <0x00043000 DT_SIZE_K(24)>;
};
};
};
my_custom dtsi-
&spi0 {
status = "okay";
compatible = "nordic,nrf-spim";
pinctrl-0 = <&spi0_default>;
pinctrl-1 = <&spi0_sleep>;
pinctrl-names = "default", "sleep";
cs-gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;
w25q64: w25q64@0 {
compatible = "jedec,spi-nor";
reg = <0>;
status = "okay";
spi-max-frequency = <8000000>;
jedec-id = [ef 40 17];
size = <0x4000000>;
sfdp-bfp = [
e5 20 f1 ff ff ff ff 03
44 eb 08 6b 08 3b 04 bb
ee ff ff ff ff ff 00 ff
ff ff 00 ff 0c 20 0f 52
10 d8 00 ff 23 72 f5 00
82 ed 04 cc 44 83 68 44
30 b0 30 b0 f7 c4 d5 5c
00 be 29 ff f0 d0 ff ff
];
has-dpd;
t-enter-dpd = <3000>;
t-exit-dpd = <30000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
slot1_partition: partition@0 {
label = "image-1";
reg = <0x00000000 DT_SIZE_K(220)>;
};
};
};
};
app overlay-
&w25q64 {
status = "okay";
};
/ {
chosen {
nordic,pm-ext-flash = &w25q64;
};
};
Mcubbot.conf-
&w25q64 {
status = "okay";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
slot1_partition: partition@0 {
label = "image-1";
reg = <0x00000000 DT_SIZE_K(220)>;
};
};
};
/ {
chosen {
nordic,pm-ext-flash = &w25q64;
};
};
prj-
#Flash support (required for MCUboot / DFU)
CONFIG_FLASH=y
CONFIG_FLASH_PAGE_LAYOUT=y
CONFIG_FLASH_MAP=y
# Enable MCUboot bootloader
#CONFIG_BOOTLOADER_MCUBOOT=y
# BLE DFU via MCUmgr (recommended helper)
CONFIG_NCS_SAMPLE_MCUMGR_BT_OTA_DFU=y
# Optional: speed up DFU, automatically extends BT buffers & data length
CONFIG_NCS_SAMPLE_MCUMGR_BT_OTA_DFU_SPEEDUP=y
# (Optional but recommended) Require authenticated SMP over BLE
# CONFIG_MCUMGR_TRANSPORT_BT_PERM_RW_AUTHEN=y
#Logging + BLE
CONFIG_LOG=y
CONFIG_BT=y
# SoC TX power (0 dBm for nRF52832)
CONFIG_BT_CTLR_TX_PWR_ANTENNA=0
# 32 kHz RC oscillator
CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC=y
# BLE Peripheral
CONFIG_BT_PERIPHERAL=y
CONFIG_BT_DEVICE_NAME="embel"
CONFIG_BT_EXT_ADV=y
CONFIG_BT_CTLR_ADV_EXT=y
CONFIG_BT_DEVICE_APPEARANCE=0
# Device Information Service
CONFIG_BT_DIS=y
CONFIG_BT_DIS_FW_REV=y
# Step 1.1 - Enable SPI driver for the application
CONFIG_GPIO=y
CONFIG_SPI=y
CONFIG_SPI_NOR=y
CONFIG_SPI_NOR_SFDP_DEVICETREE=y
CONFIG_SPI_NOR_FLASH_LAYOUT_PAGE_SIZE=4096
# QSPI drivers are enabled by defualt for some chips.
# Disable it explicitly to be sure QSPI is disabled.
CONFIG_NORDIC_QSPI_NOR=n
CONFIG_SOC_NRF52832_ALLOW_SPIM_DESPITE_PAN_58=y
CONFIG_SETTINGS=y
CONFIG_BT_SETTINGS=y
CONFIG_NVS=y
# RTT Logging
CONFIG_USE_SEGGER_RTT=y
CONFIG_LOG_BACKEND_RTT=y
CONFIG_LOG_MODE_IMMEDIATE=y
CONFIG_RTT_CONSOLE=y