nPM1300 BUCK2 not regulating to 3.3 V in standalone mode

[tarunkt]

Hi Nordic team,

I'm debugging a custom board using the nPM1300 and I'm seeing unexpected behavior from BUCK2. I'd appreciate any guidance on whether I'm misunderstanding the VSET configuration or if there is another startup/configuration requirement that I'm missing.

Hardware Configuration

• PMIC: nPM1300

• Operating mode: Standalone (no PMIC configuration over I²C)

• BUCK2 desired output: 3.3 V

• VSET2 resistor: 300 kΩ to GND

• According to the nPM1300 Product Specification v1.3, the VSET2 table shows:

  • 250–500 kΩ → 3.3 V

• NTC pin connected to GND through a 0 Ω resistor

• No intentional connection between BUCK2 output and VSYS

• Resistance from VSET2 to GND measures approximately 300 kΩ on the board

Observed Behavior (Board Under Test)

With USB power connected:

Signal	Measured Voltage
VBUS	5.1 V
VSYS	5.0 V
BUCK2 Output (VOUT2)	4.45 V

The expected BUCK2 output is 3.3 V, but instead it sits around 4.45 V.

Battery-only operation

When running from battery:

• One board measures ~3.3 V at BUCK2 output

• Another board measures ~3.5 V at BUCK2 output

The output appears to track the battery voltage rather than regulate to a fixed 3.3 V.

Questions

1. Is 300 kΩ a valid VSET2 value for selecting 3.3 V on nPM1300 Product Specification v1.3?

2. In standalone mode, should BUCK2 automatically enable and regulate to the VSET-selected voltage at startup?

3. Could grounding the NTC pin through 0 Ω affect BUCK2 startup or operation?

4. Is it expected that VSYS measures almost the same as VBUS (5.0 V vs 5.1 V) in this configuration?

5. Are there any recommended measurements or status registers that would help determine whether BUCK2 is actually enabled?

Any suggestions for further debugging would be greatly appreciated.

Thank you.

[Szabolcs]

Hi,

Issue 1: This is a good catch, I did not notice these two resistors in the schematic both being mounted. This explains the behavior perfectly: VSYS is connected through R10 and R29 to GPIO1, which has an internal ESD diode going to VDDIO, which is connected to VOUT2. Thus, VSYS is backpowering the Buck, which is not running since the voltage is always higher than the target. (Usually, in designs like this, I like to overlay the common pads of the two resistors on the PCB, so physically only one can fit.)

Issue 2: This didn't come up earlier, but due to the rework that was needed for the I2C lines, it is plausible that the voltage rails got mixed up and the voltage was leaking through some pull-up resistors from the supply to the LDO, but since it will be updated in your next revision (I assume), it shouldn't be a problem. There is also an "active discharge" feature for the LDOs, which essentially enables an internal pull-down to get rid of stray voltage.

Thank you very much for sharing, I'm happy that the problems could be solved and your boards are functioning again.