Can't flash nrf5340 via SWD

[Ayush0]

Hello, 

I am having trouble programming the nrf5340 chip using SWD. 

Set up: 

 Custom hardware with the MDBT53V-1M module from Raytac, nrf5340 chip.

 SWD, using J-Link EDU mini. 

Problem scenario: was able to flash the code to the chip at first. Then after few successful attempts, failed to connect to target.

Now, I have another board with the same hardware and can connect to the chip fine there, so that eliminates the wrong wiring problem. 

I suspect the chip has gone into AP protect mode or  something similar which is preventing the SWD. 

Any help is much appreciated. 

Thank You

PS C: nrfjprog --recover
[error] [SeggerBackend] - JLinkARM.dll reported error -256 at line 736.
[error] [SeggerBackend] - JLinkARM.dll reported error -256 at line 629.
[error] [SeggerBackend] - JLinkARM.dll reported error -256 at line 3139.
[error] [SeggerBackend] - JLinkARM.dll reported error -256 at line 911.
[error] [SeggerBackend] - JLinkARM.dll reported error -256 at line 3139.
[error] [SeggerBackend] - JLinkARM.dll reported error -256 at line 3139.
[error] [SeggerBackend] - JLinkARM.dll reported error -256 at line 3139.
[error] [SeggerBackend] - JLinkARM.dll reported error -256 at line 3087.
[error] [SeggerBackend] - JLinkARM.dll reported error -256 at line 3112.
[error] [SeggerBackend] - JLinkARM.dll reported error -256 at line 3349.
[error] [SeggerBackend] - JLinkARM.dll reported error -256 at line 3160.
[error] [SeggerBackend] - JLinkARM.dll reported error -256 at line 3176.
[error] [ Client] - Encountered error -6: Command connect_to_emu_with_snr executed for 10124 milliseconds with result -6
ERROR: Unable to connect to a debugger.
[error] [ Worker] - Device is not recognized.
ERROR: nrfjprog could not identify the target device. This may be due to an 
ERROR: invalid family argument, a problem with your device, or nrfjprog may
ERROR: not yet support your device.
ERROR: Please check the family argument passed, or upgrade nrfjprog to a more
ERROR: recent version.
NOTE: For additional output, try running again with logging enabled (--log).
NOTE: Any generated log error messages will be displayed.

[Håkon Alseth]

Hi,

 

In order to recover the nRF5340 in nrfjprog, you should set the family flag, and try to address each core manually:

nrfjprog --recover -f nrf53 --coprocessor CP_NETWORK
nrfjprog --recover -f nrf53 --coprocessor CP_APPLICATION

 

If this still does not successfully recover the device, could you try the sequence outlined here?

 RE: Unable to flash or erase nRF9151 SMA DK via J-Link ("Setting the debug port SELECT register failed" error) 

 

Kind regards,

Håkon

[Ayush0]

Hi Hakon, 

I have tried both, but still no luck. 

Thank You 

Ayush 

[Håkon Alseth]

Hi Ayush,

 

If you run the two recover commands in a looped batch script:

:loop
nrfjprog --recover -f nrf53 --coprocessor CP_NETWORK
nrfjprog --recover -f nrf53 --coprocessor CP_APPLICATION
goto loop

 

While you power on/off your nRF, are you then able to recover it?

 

Kind regards,

Håkon

[Ayush0]

Hi Hakon,

Tried running the batch script and switching the nRF On/ Off multiple times but still no luck. 

Any other suggestions. 

Thank You for your time. 

Ayush 

[Håkon Alseth]

Hi Ayush,

 

Thank you for confirming.

Since you are using a custom board, with a module; have you double-checked the soldering of the board/module? Do you have many devices manufactured that exhibit this issue, or is it only one?

 

Kind regards,

Håkon

[Ayush0]

Hello, 

I have checked the soldering and it seems fine to me. 

We are at a developing stage so only have three units. 

I have seen this problem in two units.

On the third unit, I have not flashed any code yet, but I am able to ping it using  the "connect" command on the J-Link Commander. I don't want to flash any code yet on the third board. 

What could be the root cause of the problem ? 

My modules have been set up in LDO mode and have no inductors to run DC DC mode.

I have been uploading the sample "blinky" and "blinky_pwm" code. 

Could it be that these sample code enable the DC DC mode, which then causes the MCU to be stuck in DC DC mode forever, hence not allowing to be programmed again ?

If you can 100% confirm this is the case then I can flash the third board with a completely blank code and not use the sample code, and see if I get the same problem. 

Thank You 

Ayush 

[PjGlasso]

Hi there,

SO may be the case that ;

How to Access and Recover the Bricked Devices

When DC/DC power converters are enabled in software on a board that lacks the required LC filter components (inductors and capacitors), the power management unit (REG1/REG2) fails to regulate voltage. This drops the core voltage below operational thresholds, putting the MCU into a brownout state where the standard SWD debug interface shuts down instantly after reset.

To regain access, the SWD debug port must halt the CPU core before the application firmware executes the code that enables the DC/DC converters:

1. Hardware Force-Reset Sequence (Under Reset Connection):

   • Connect the nRESET line from your debugger (J-Link) to the target board's reset pin.

   • Open J-Link Commander (JLink.exe) and configure the target device (nRF5340_XXAA_APP or nRF5340_XXAA_NET).

   • Execute: 

     device nRF5340_XXAA_APP
     si SWD
     speed 4000
     connect

   • Select Connect Under Reset (or issue r followed immediately by h / halt in command mode) to freeze the CPU at address 0x00000000 before the Zephyr boot initialization code runs.

Once halted, issue an erase command: ERASE

• You can also do something similar in nRFjprog too.    
  nrfjprog --recover -f nrf53 --coprocessor CP_APPLICATION
  nrfjprog --recover -f nrf53 --coprocessor CP_NETWORK

OK

How to Prevent the Issue in Future Builds

To permanently fix this on custom hardware that uses LDO mode (without external inductors), disable the DC/DC regulators in your project's Kconfig:

1. Disable DC/DC Regulators in prj.conf: Add these configurations to your application's prj.conf file to force the MCU to use the internal Low-DropOut (LDO) regulators for both application and network cores:

   # Disable DC/DC converters (Forces LDO mode)
   CONFIG_BOARD_ENABLE_DCDC_APP=n
   CONFIG_BOARD_ENABLE_DCDC_NET=n
   CONFIG_BOARD_ENABLE_DCDC_HV=n

2. Define a Custom Board Definition: If you build custom nRF5340 hardware regularly, create a dedicated board overlay or custom board target in the nRF Connect SDK rather than building using standard DK targets (nrf5340dk_nrf5340_cpuapp), as standard DK target configurations turn DC/DC modes on by default.

HTH

GL :-) PJ :v: