FLPR GPIO Interrupts

Hello,

I have a pin on port 1 of the nrf54l15 that I am bitbanging for a custom tx/rx 2-wire protocol. I have already managed to implement the tx capability and I was hoping to use gpio interrupts on the rx signal to determine the start condition, and then continue to read the pin states to determine the incoming packet.

Reading up on this, I am wondering if I am unable to receive interrupts on my board because my pin is not in port 2 per this page: https://nrfconnectdocs.nordicsemi.com/ncs/latest/nrf/app_dev/device_guides/coprocessors/rt_peripherals.html#mapping-pins

Am I understanding this correctly? If I am not understanding this correctly, how can I enable gpio interrupts on a pin from port 1 in my FLPR code?

My firmware is quite simply doing the following which normally works in the application core:

// Configure the RX pin
ret = gpio_pin_configure_dt(&rx_pin_dt_spec, (GPIO_INPUT | rx_pin_dt_spec.dt_flags));
ASSERT_RET_SUCCESS(ret);

// Set up the interrupt and callback
ret = gpio_pin_interrupt_configure_dt(&rx_pin_dt_spec, GPIO_INT_EDGE_FALLING);
ASSERT_RET_SUCCESS(ret);

_callback.pin_mask = BIT(rx_pin_dt_spec.pin);
ret = gpio_add_callback_dt(&rx_pin_dt_spec, &_callback);
ASSERT_RET_SUCCESS(ret);

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  • Hi Robert, 
    Please be aware that port P2 doesn't generate interrupt regardless if it's main app core or the FLPR core. See section 8.8.3 in the datasheet. 



    So the link you referred to is only about the GPIO pins that can be used as VPR IO (  High-Performance Framework )  . Not about pins that can be used with FLPR. 
    As far as I know FLPR should be able to access all pins. 

    Could you give more detail on which exact P1 pin that you tried to configure to get interrupt ? 
    What's the result when you run the firmware on the FLPR ? 

Reply
  • Hi Robert, 
    Please be aware that port P2 doesn't generate interrupt regardless if it's main app core or the FLPR core. See section 8.8.3 in the datasheet. 



    So the link you referred to is only about the GPIO pins that can be used as VPR IO (  High-Performance Framework )  . Not about pins that can be used with FLPR. 
    As far as I know FLPR should be able to access all pins. 

    Could you give more detail on which exact P1 pin that you tried to configure to get interrupt ? 
    What's the result when you run the firmware on the FLPR ? 

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