Programming external module over SWD using nrf7002dk

[ccdev]

I am using an nrf7002dk and my external modules have arrived. The external modules are Minewsemi MS12SF1, which is a combo of nrf5340 and nrf7002.

To start, I wanted to ensure that I am connecting the module correctly to the P20 custom SWD header on the dev kit. My goal is to flash the hello world sdk sample to the module. The problem I am having is that the module dopesnt appear to be connected, and I think I can confirm this using the JLinkExe (see output below).

I have things wired as follows:

P20 SWDIO -> module SWDIO

P20 SWDCLK -> module SWDCLK

P20 pin2 (VDD) -> module VCC

P20 pin3 (VTG) -> module VCC

P20 GND DETECT -> common GND

P1 GND ->common GND

module GND -> common GND

So as you can see, Im powering the module using the P20 pin2, as per the nordic documentation which states:

If it is inconvenient to have a separate power supply on the external board, the nRF7002 DK can supply power through pin 2 (VDD) of P20

(the full documentation for the nrf7002dk can be found here: https://www.farnell.com/datasheets/4628156.pdf)

I understand that the P20 pin2 will only provide 1.8v, so this feels like a catch22 situation because the MS12SF1 module requires ~3.v. If I power the module using the P20 header pin2, then it would seem Im not providing enough power to the module. Yet, if I power the module externally using a ~3v power supply, then there is a clear mismatch in voltage on the SWD line (1.8v vs 3v).

What can I do to solve this problem? My instinct tells me that I need to do one of the following:

1. logic level shifting on the swd line i.e 1.8v <> 3v

2. use a different dev kit that operates at 3v instead of 1.8v

3. just go ahead and try powering the module externally using 3v (and not simulataneously the 1.8v P20 pin2), and hope things dont get damaged.

What is the correct solution here?

FYI the reason I am confident that there is no connection being made between the dev kit and the module is that when i run JLinkExe, I always see the same output, whether the module is connected to the SWD line or not, i.e:

➜ hello_world_4 git:(master) ✗ JLinkExe
SEGGER J-Link Commander V9.74 (Compiled Sep 2 2026 12:36:32)
DLL version V9.74, compiled Sep 2 2026 12:35:17

Connecting to J-Link ...O.K.
Firmware: J-Link OB-nRF5340-NordicSemi compiled Jun 11 2026 13:12:28
Hardware version: V1.00
J-Link uptime (since boot): 0d 00h 00m 07s
S/N: 1050780352
License(s): RDI,FlashBP,FlashDL,JFlash,GDB
USB speed mode: Full speed (12 MBit/s)
VTref=3.300V

Type "connect" to establish a target connection, '?' for help
J-Link>connect
Please specify device / core. <Default>: NRF5340_XXAA_APP
Type '?' for selection dialog

Device>
Please specify target interface:
J) JTAG (Default)
S) SWD
T) cJTAG
TIF>s
Specify target interface speed [kHz]. <Default>: 4000 kHz
Speed>
Device "NRF5340_XXAA_APP" selected.

Connecting to target via SWD
ConfigTargetSettings() start
ConfigTargetSettings() end - Took 6us
InitTarget() start
InitTarget() end - Took 3.32ms
Found SW-DP with ID 0x6BA02477
DPIDR: 0x6BA02477
CoreSight SoC-400 or earlier
AP map detection skipped. Manually configured AP map found.
AP[0]: AHB-AP (IDR: Not set, ADDR: 0x00000000)
AP[1]: AHB-AP (IDR: Not set, ADDR: 0x00000000)
AP[2]: MEM-AP (IDR: Not set, ADDR: 0x00000000)
AP[3]: MEM-AP (IDR: Not set, ADDR: 0x00000000)
AP[0]: Core found
AP[0]: AHB-AP ROM base: 0xE00FE000
CPUID register: 0x410FD214. Implementer code: 0x41 (ARM)
Feature set: Mainline
Cache: No cache
Found Cortex-M33 r0p4, Little endian.
FPUnit: 8 code (BP) slots and 0 literal slots
Security extension: implemented
Secure debug: enabled
CoreSight components:
ROMTbl[0] @ E00FE000
[0][0]: E00FF000 CID B105100D PID 000BB4C9 ROM Table
ROMTbl[1] @ E00FF000
[1][0]: E000E000 CID B105900D PID 000BBD21 DEVARCH 47702A04 DEVTYPE 00 Cortex-M33
[1][1]: E0001000 CID B105900D PID 000BBD21 DEVARCH 47701A02 DEVTYPE 00 DWT
[1][2]: E0002000 CID B105900D PID 000BBD21 DEVARCH 47701A03 DEVTYPE 00 FPB
[1][3]: E0000000 CID B105900D PID 000BBD21 DEVARCH 47701A01 DEVTYPE 43 ITM
[1][5]: E0041000 CID B105900D PID 002BBD21 DEVARCH 47724A13 DEVTYPE 13 ETM
[1][6]: E0042000 CID B105900D PID 000BBD21 DEVARCH 47701A14 DEVTYPE 14 CSS600-CTI
[0][1]: E0040000 CID B105900D PID 000BBD21 DEVARCH 00000000 DEVTYPE 11 TPIU

Memory zones:
Zone: "Default" Description: Default access mode
Cortex-M33 identified.

J-Link>mem32 0x00000000 16
00000000 = 200017A0 00000B81 000044A5 00000B6D
00000010 = 00000B6D 00000B6D 00000B6D 00000B6D
00000020 = 00000000 00000000 00000000 00000C51
00000030 = 00000B6D 00000000 00000DED 00000B6D
00000040 = 00000E65 00000E65 00000E65 00000E65
00000050 = 00000E65 00000E65

The last part always looks the same, which to me says that I am always reading the dev kit, even when the module is connected to the P20 header, i.e:

J-Link>mem32 0x00000000 16
00000000 = 200017A0 00000B81 000044A5 00000B6D
00000010 = 00000B6D 00000B6D 00000B6D 00000B6D
00000020 = 00000000 00000000 00000000 00000C51
00000030 = 00000B6D 00000000 00000DED 00000B6D
00000040 = 00000E65 00000E65 00000E65 00000E65
00000050 = 00000E65 00000E65

If the module was being detected, then i expect the output of this command would predictable change whether the module is connected or not because we would be reading memory from either the dev kit of the module.

[Simon D-M]

Hi,

As you said the nRF7002 DK VDD is by default 1.8V. However, it is possible to set that VDD to a different voltage. To do this you can use the VIO_REF pin. There is a follower circuit that will make the VDD follow this voltage (of course you cannot go above the DK power supply voltage, which is most likely 5V if the DK is powered through USB).

So in your case, if you need 3V on your custom board, you have to input a constant 3V signal to the VIO_REF pin. And then you can use the IMCU from the nRF7002 to program and debug your custom board.

Best regards,

Simon

[ccdev]

I was debating with myself if that would work! I was hesitant to try it because it doesnt mention it in the 7002dk docs, it just says "the external module must match the 1.8 dk". 

FYI: i actually successfully flashed without the vio_ref, but any code related to the wifi didnt work, probably because my module requires ~3v for wifi (vbat70) and the dk p20 pin2 is only supplying 1.8v, which makes sense.

Im going to try powering the module externally at 3v and sending the same 3v into the vio_ref tomorrow, as you suggested.

Got a suggestions on the cleanest way to get the console output from my module? Once i send the external 3v to vio_ref, is it also safe to connect the gpio tx pin on my module to the p0.22 on the dk, so i can see printk() logs from my module uaing the vcom in vscode? Im guessing no, because the p0.22 is not part of the p20 header, so i would be sending 3v into the 1.8 domain.

Maybe i ought to go directly from the gpio tx pin on my module to a uart/usb connector straight into my mac if i want console output from the module? Or should i just use RTT (which currently works)

Thanks for the fast reply btw!