I'm aware of https://devzone.nordicsemi.com/f/nordic-q-a/125252/reset-over-ctrl-ap/555253?focus=true
Is it possible for an nRF54 to safely use the CPU access to the AP registers to induce a pin reset on its own as an alternative to triggering a WDR?
I'm looking for software ways to cause the chip to reset to handle the edgecase of a poorly configured watchdog that is locked out.
TAMPC, WDR, and CTRL-AP resets appear to be sufficient to correct this based on the datasheet. I would not be able to drive a pin reset externally in this situation.
The results from your AI support the idea that this connection exists and can be used, but caveats the safety question:
Based on the knowledge sources, yes — the nRF54L series does expose a CPU-side CTRL-AP RESET register (at peripheral address offset
0x520) that can be written directly by the CPU (not just by an external debugger).The CPU-side
RESET register supports the following values:| Value ID | Value | Description |
|---|---|---|
NoReset |
0 | No reset is generated |
SoftReset |
1 | Perform a device soft reset |
HardReset |
2 | Perform a device hard reset |
PinReset |
4 | Perform a device pin reset |
So writing
4 (PinReset) to the RESET register at base address 0x50052000 (secure) or 0x40052000 (non-secure) + offset 0x520 should trigger a pin reset from software, without needing an external signal or a watchdog.A few important caveats the knowledge sources do not fully address, so I want to be transparent about limitations:
-
The knowledge sources confirm the register exists and is CPU-writable (
Waccess), but do not explicitly describe any side effects, restrictions, or security/TrustZone gating that might prevent a non-secure or unprivileged context from writing it. You should verify whether TrustZone configuration restricts access to the secure (SCTRLAP) vs. non-secure (NS) instance. -
The instance table shows both a secure (
0x50052000) and non-secure (0x40052000) base address, so access from non-secure code may be possible depending on your configuration. [Register overview] -
The knowledge sources do not confirm whether a CPU-initiated
PinResetvia this register is treated identically to a hardware pin reset in terms of reset domain behavior (e.g., whether it clears the same state as a true pin reset). You should cross-reference the full reset domain documentation in the datasheet to confirm it meets your requirements for clearing a locked watchdog configuration.
In summary: yes, writing
PinReset (value 4) to the CPU-side CTRL-AP RESET register appears to be a valid software-initiated pin reset mechanism on the nRF54L15/L10/L05, and is a reasonable alternative to a WDT reset for your described edge case — but verify TrustZone access permissions and reset domain behavior in the full datasheet.