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UARTE STOPRX on exact byte

Hi there,

I'm issuing a STOPRX at a specific time but I'm noticing that more bytes are being put into the buffer from after the STOPRX was issued.

Is there a way to stop the UARTE on the exact byte and process, and receive all bytes from that point on to a different buffer?

Please advise.

UPDATE

After triggering a STOPRX, the UARTE will hang around for a few more bytes, placing them in the same buffer and then calling ENDRX. This is problematic since these new bytes are part of a different message.

image description

Here you can see that STOPRX is triggered during some small idle times, yet the ENDRX doesn't happen till much later.

This results in ENDRX being called with 11, 6 and 1 bytes read (when it should be 6, 6 and 6 bytes read)

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  • No. The documentation addresses this. if you're using nRF52 (UARTE so I assume so) up to 4 bytes can be received after the STOPRX task. How many actually are depends on what's on the other end transmitting data to you, if it's slow stopping after the RTS signal is deactivated and keeps sending more data, the UARTE is going to receive it. I assume you're using hardware flow control.

    Those bytes however go into the RX FIFO so you can update the memory buffer pointer after you get the ENDRX event and then flush to start those bytes off in your new buffer.

  • ... in the RX FIFO ready for the next transfer. That would make STOPRX really mean stop RX.

    But it seems that's not how it works in this implementation. STOPRX begins the 'waiting to stop' period, the UART will continue to receive until either 1) it detects a long period of inactivity (the timeout) and infers the sender has stopped or 2) it receives 4 more bytes. Of those bytes, as many as will fit in the buffer will go there, all 4 in many cases, the rest will then sit in the RX FIFO.

    This is my mental model for what it's doing. I'd prefer it did something slightly different, but I can see reasons why it might work that way, DMA transfers run sort of independently so they aren't necessarily easy to stop. Doesn't help the original poster's use case, I think using legacy mode would do what he actually needs to get done.

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  • ... in the RX FIFO ready for the next transfer. That would make STOPRX really mean stop RX.

    But it seems that's not how it works in this implementation. STOPRX begins the 'waiting to stop' period, the UART will continue to receive until either 1) it detects a long period of inactivity (the timeout) and infers the sender has stopped or 2) it receives 4 more bytes. Of those bytes, as many as will fit in the buffer will go there, all 4 in many cases, the rest will then sit in the RX FIFO.

    This is my mental model for what it's doing. I'd prefer it did something slightly different, but I can see reasons why it might work that way, DMA transfers run sort of independently so they aren't necessarily easy to stop. Doesn't help the original poster's use case, I think using legacy mode would do what he actually needs to get done.

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