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Can nRF24L01 leave the RX mode with CE tied to VDD?

Hello.

I am trying to save i/o lines on an 8-pin PIC, and planning to run an nRF24L01P with its CE pin tied to VDD. I am willing to power-down to get out of the RX mode occasionally (as I need to do in order to use the W_REGISTER command which is not allowed in RX). The state diagram in specs indicate that I can get out of RX either by setting CE=0 (which I do not want) or by powering-down. But how can I power-down if I cannot write to the CONFIG register in RX mode?

Regards..

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  • Hi, most likely this will work. It's not tested and qualified operation, but it is technically possible to set CE high all the time, and write the PWR_UP bit in the CONFIG register, and change configuration when in power down. There will effectively be a 1.5ms delay when changing configuration when enable PWR_Up bit again, due to the startup of the 16MHz crystal, but likely it will work.

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  • Hi, most likely this will work. It's not tested and qualified operation, but it is technically possible to set CE high all the time, and write the PWR_UP bit in the CONFIG register, and change configuration when in power down. There will effectively be a 1.5ms delay when changing configuration when enable PWR_Up bit again, due to the startup of the 16MHz crystal, but likely it will work.

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  • Thanks for the answer. I was worried by the statement "Executable in power down or standby modes only" associated with the W_REGISTER command in the specs. If I cannot use this command, I cannot change the PWR_UP bit. What I understand from your answer is that the command may still work, though "not tested and qualified". I guess I will try and see if the operation can be performed consistently with the modules I have. Thanks again..

  • I ran the test and it works - like you said it would most likely do! By the way, I also found on the internet that some people have tied the CE pin to the CSN pin. That would put the unit in standby each time spi is activated. However that would also mean that receiver would be down on each and every spi operation, with an associated delay. So, CE=1 is the way I will go, it allows a better control over device states. Thanks again for the information.

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