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Clarification of GPIO configuration for SPI master

Remo

Hi all

Chapter 26.1.1 of the nRF51 series reference manual v3.0 states that the pins used by the SPI master have to be configured in the GPIO registers according to table 221.

Now, I have some points that are not quite clear to me:

  1. Are the GPIO settings only necessary for the OFF mode or for the normal operation when the SPI master is enabled? We are using the SPI master already for a while and haven't realized that the GPIO registers must be configured, but so far we didn't run into any problems...
  2. Why is it necessary that the input buffer of the SCK pin has to be connected although the pin is configured as output?

Many thanks in advance for your help!

Kind regards

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    I know that PSELSCK, PSELMOSI, and PSELMISO are just selecting the pins, but when I enable the SPI master module I assume/expect that the SPI master takes over the control of these pins and therefore overrides the settings made in the GPIO module.

    I would have expected that the suggested GPIO settings from table 221 are only relevant when the SPI master is disabled again or the chip enters the OFF mode.

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  • 0

    I know that PSELSCK, PSELMOSI, and PSELMISO are just selecting the pins, but when I enable the SPI master module I assume/expect that the SPI master takes over the control of these pins and therefore overrides the settings made in the GPIO module.

    I would have expected that the suggested GPIO settings from table 221 are only relevant when the SPI master is disabled again or the chip enters the OFF mode.

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