Max value for tERASEALL and tPAGEERASE (nRF51422)?

[Brian Acock]

I am currently using ARM's CMSIS-DAP interface to support flashing of an nRF51422 from a host MCU (i.e. to perform updates of the SoftDevice and/or application code running on nRF).

I have written functionality that, based on the value of FICR.PPFC, will either invoke the ERASEALL operation or the ERASEPAGE operation (the latter would be invoked multiple times using an algorithm I wrote to determine the number of code pages in CR1).

As part of this erase functionality, after initiating the erase operation, I sit in a loop polling the NVMC.READY register (waiting for erase to complete). Execution continues when the NVMC is ready, or we "timeout" based on how long the erase operation should take.

The problem with the "timeout" mechanism is that the nRF51422 product spec only lists the typical amount of time for erase operations (tERASEALL and tPAGEERASE). I'm not so concerned about the ERASEALL operation but for the scenario of erasing individual pages, which could easily exceed 200 in number, a max value for tPAGEERASE would be crucial. Right now I'm allowing each page erase to take up to 1 second, so theoretically I'm allowing an erase of CR1 to take up to 200 seconds (assuming 200 pages to erase).

This is a really long winded way for me to ask, is a maximum value for tPAGEERASE available? What about tERASEALL?

Thanks!

[Charles Manning]

According to the spec sheet, tERASE and tERASEALL are both typically 21msec.

Maximum values are hard to define for flash, but I would suggest you can take, say, 10x typical as a reasonable maximum.