nRF52, SPIM0, I'm getting EVENTS_ERROR with ERRORSRC set to 0x01. However that error isn't documented, 0x02 is ANACK, 0x04 is DNACK, what's 0x01?
nRF52, SPIM0, I'm getting EVENTS_ERROR with ERRORSRC set to 0x01. However that error isn't documented, 0x02 is ANACK, 0x04 is DNACK, what's 0x01?
Hi RK,
As far as I know there is no ERRORSRC register for SPIM. SPI and TWI share registers, and it seems to me you refer to the TWIM registers. Are you sure you have not enabled conflicting SPI and TWI instances, and that you are operating the correct peripheral?
The TWIS ERRORSRC register uses 0x01, 0x04 and 0x08 for OVERFLOW, DNACK and OVERREAD respectively.
Note that the ERRORSRCregister address is not the same for TWIS and TWIM, and that there are no documented SPI registers at the addresses for the TWIS and TWIM ERRORSRC registers.
Regards, Terje
Yeah, that sounds reasonable. Just wanted to add that I am looking into this in order to confirm your observations and I will get back to you when I get a definite answer regarding this undocumented error.
Yeah, that sounds reasonable. Just wanted to add that I am looking into this in order to confirm your observations and I will get back to you when I get a definite answer regarding this undocumented error.