sparkfun txb0104 level sifter and nrf52

[Matts]

Hi.

We are trying to get nrf52 to work with 1.8v spi master. We are using level sifter with it. However when we connect the nrf52 to level sifter to spi output, the whole thing pretty much explodes logic vise. The sparkfun says this level sifter cannot be used with other than push-pull-type signaling. Is your spi not this type?

EDIT: with default SPIS lines the MISO is still crap:

#define SPIS0_CONFIG_SCK_PIN         2
#define SPIS0_CONFIG_MOSI_PIN        3
#define SPIS0_CONFIG_MISO_PIN        4

There the blue is clock and yellow is the MISO line. The picture is from nrf side of the level sifter. MOSI is OK. In below blue is again clock and yellow is MOSI.

[bjorn-spockeli]

SPI peripheral on the nRF52 is activly driven, i.e. Push-Pull, so this should not be an issue. Are you able to provide a logic trace/capture of the SPI lines? If so could you provide a trace of the SPI input and output to/from the level shifter.

I also found this in the comment section on the Sparkfun product page(here is the link) :

One problem I ran into–and it is a problem with the IC, not with SparkFun’s breakout board–is that the IC will oscillate if the load on any output is too heavy. If you find that is the case, add a buffer IC downstream of the output.

-Bjørn

[Matts]

We had the spi lines connected to different IO pins than in your example. I was using 11-14 due shorter connection in our mount. I swithed to pins you guys are using in SPIS example and the signals were OK.

Interestingly if I connect two of these components using two different VDD outs from the nrf52, USB stops working.

[Matts]

The miso still sucks. See attached picture in the question.

[bjorn-spockeli]

The first picture is from the nRF side and the second is the output from the level shifter?

[Matts]

Both are from nrf side. The other side is pretty much the same, except the logic level. Also it doesn't matter if we've connected the level sifter to MISO at all. The output directly from nrf side pin is similar.

I've tried the code itself on another master with those different pins, and it outputs the stuff OK to bus. Dunno if the problem here is too much load on other channels or something. As I said, if I connect another level sifter to VDD the USB stops working.