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Hard-Fault on any interrupt in s110 soft device on nRF51822

We have a custom nrf15822-AA board flashed with the S110 (6.0.0) and our application. It has a 32khz crystal. It is connect to our (Mac) development systems with a SEGGER J-Link Ultra+.

Using GCC 4.7.4 and J-Link on the command line, all works fine.

I've been trying to bring the project up in Rowley Crossworks 3 and it's GCC. It runs, but It appears ANY interrupt (timer, RTC, GPIO) causes a hard-fault in the S110. Specifically, we stop at the hard-fault handler at 0x12ACE, and looking back on the stack, the hard-fault is apparently being generated at 0x12B50. If I let execution continue, it goes off into space.

The soft device is initialized before any interrupts are enabled. So it is active when this occurs.

Yes, we only use the sd_nvic routines.

Our interrupt vector table at 0x00014000 looks fine (but is never even read, AFAIKT - none of our handlers are ever entered).

The soft device appears to be loaded properly. (That is, whether I burn it with Crossworks or SEGGER, it lands at the same place.) It's IVT looks rational too.

Since this works with the GCC command line, it is obviously something with the Crossworks toolchain configuration. But since it is the S110 that is faulting, I thought I'd see if you folks have any thoughts.

Thanks.

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  • Could it be that Rowley doesn't reset the chip properly? It seems it's likely that it fails in this way if the forward address hasn't been set correctly, and this may happen if the softdevice's reset handler haven't been run.

    I'd hence recommend you to see if you have any way of controlling where the debugger starts the chip, and if you do, make sure that it starts at the reset handler on address 0x04, not on 0x14004. Adding an additional debugger-initiated reset right after launch may also help, but I'm not familiar with Rowley so I can't say exactly how you can do this.

    We've previously seen this issue with both Eclipse and IAR, and I'm honestly a little surprised that the IDEs do this, since a Cortex M0 will by spec always start at 0x0 when free-running. The similar question for Eclipse is here, but the IAR case was handled in the regular support system, so I can't link to details.

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  • Could it be that Rowley doesn't reset the chip properly? It seems it's likely that it fails in this way if the forward address hasn't been set correctly, and this may happen if the softdevice's reset handler haven't been run.

    I'd hence recommend you to see if you have any way of controlling where the debugger starts the chip, and if you do, make sure that it starts at the reset handler on address 0x04, not on 0x14004. Adding an additional debugger-initiated reset right after launch may also help, but I'm not familiar with Rowley so I can't say exactly how you can do this.

    We've previously seen this issue with both Eclipse and IAR, and I'm honestly a little surprised that the IDEs do this, since a Cortex M0 will by spec always start at 0x0 when free-running. The similar question for Eclipse is here, but the IAR case was handled in the regular support system, so I can't link to details.

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