DCDC Supply Response / Radio Performance with Supply Ripple

[cole]

I am using nrf51822 powered by a 3.3V regulator in a li-ion powered application. We have a high current load that we're controlling with PWM at 20kHz. Radio performance is good until lower state of charge when high current load switching causes battery voltage to drop below 3.3V. We're using Softdevice S110 v8.0.0 and revision 3 nrf51822 in QFN package.

Regulator is 3.3V instead of a lower output voltage because we want consistent white balance between RGB LEDs on a single board and from board to board over most of the device's discharge cycle. We'd like to keep switching the high current load while maintaining bluetooth connection with central down to end of discharge (2.5-2.7V loaded battery voltage).

3.3V regulator output will see up to ~300mV swing over ~5ms when load is switched and unloaded battery voltage is around 3.3V or lower.

Connection to nRF Connect or our app on iOS times out (error code 6) faster the closer battery voltage gets to 3.3V (the larger regulator output dip gets when load is powered) over a discharge cycle.

We're currently running Radio LDO directly off of VDD (powered by 3.3V regulator), and I'm wondering if we'll expect to do any better with the 300mV over 5us regulator swings if we power Radio LDO from DC/DC converter. A Nordic answer to a related question seems to suggest we will do better using DC/DC in our application.

I found in a Nordic answer to another question that Nordic has tested Radio LDO to be okay with up to around 100mV supply ripple, but I can't find anything about how well DC/DC converter holds AVDD steady with VDD moving quickly or generally what Radio performance can look like using DC/DC converter in an application like ours where VDD is moving quickly by a few hundred mV.

Do you have any relevant testing that could tell me what I should expect or any specifications or scope screen grabs that describe or show AVDD response to rapid step changes in VDD with DC/DC converter enabled using nrf51822 QFN reference circuit with DC/DC converter setup (from PS v3.1)?

On a related note, should I expect external oscillators to not be happy with VDD moving like it is in our application? Is this more likely to create connectivity issues than input to Radio LDO moving as it is in our application? Block resource req's in PS v3.1 seem to suggest hfclk and lfclk are not powered by 1.2V or 1.7V LDOs, how are they powered?

[Stefan Birnir Sverrisson]

Hi cole

I suggest we verify the source for the problem, then find the solution.

I suspect that you are using custom PCB? Have we reviewed the schematics for it?

There are unfortunately no official measurements available on how much ripple the nRF51 can tolerate. I think however 300mV peak to peak ripple will cause some degradation on radio sensitivity in LDO mode. How much is hard to say, but at least a few dBm. We have made preliminary test that indicate that radio sensitivity loss is <2dBm for 100mV ripple on VDD in LDO mode. Perhaps the best way to test if radio performance is actually the problem is to see if you still lose the connection when you have connected device really close to the nRF51. If there is radio performance degradation to some degree, you should be still able to keep the connection when the devices are very close. If the connection still brakes in the same way, the source of failure probably lies somewhere else.

After the above test, if you think the problem is not because of radio performance degradation, then you could try to switch low frequency 32kHz clock source from external crystal to internal RC, or specify less accuracy for the 32kHz crystal when you initialize the softdevice, i.e. if your crystal is 20ppm, choose the NRF_CLOCK_LF_XTAL_ACCURACY_250_PPM option. That way you find out if this is accuracy problem of the crystal you are using.