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GPIOTE interrupt not being serviced

Hi All,

I'm having trouble running one of my I2C sensors connected to the nrf52 when running at a 200hz sampling rate.

Interestingly enough, the same sensor seems to work just fine when running at 20Hz, so I'm thinking the nrf52 can't keep up with the sensor's interrupt firing every 5ms, while also handling all of the softdevice's timing requirements.

If you look at the attached logic analyzer captures, the top two lines are I2C SDA/SCL connected to the problematic sensor, the third line is the interrupt, and the 4th is the I2C line of the second I2C bus, you'll see that after the 8th interrupt, another interrupt is triggered around 0.6 seconds, but there's no further I2C activity for that sensor.

I'm using SDK11, NRF52 PC10040, S132 V2.0.0, with the scheduler and started the project using the ble_app_template.

Any thoughts or ideas on how I can ensure this GPIOTE interrupt gets serviced? Currently have the GPIOTE priority set low, and am implementing PAN #73

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  • Hi,

    If you are using revision Rev 1 (QFAA-B00, QFAB-B00, CIAA-B00, CHAA-B00) or revision Engineering C (QFAA-BB0, CHAA-BA0, CIAA-BA0) chips then you do not need to implement PAN73 workaround. It only applies to older Engineering B (QFAA-BA0, CHAA-AA0) and Engineering A (QFAA-AA0, QFAA-AC0, CGAA-AA0) revisions.

    The behavior with peripheral interrupt along with softdevice activity has been discussed extensively in this forum. In short, the softdevice has highest priority over everything and depending on your BLE activity, softdevice will use CPU time that delays your peripheral interrupt being services until softdevice releases the CPU. You can use APP_IRQ_PRIORITY_HIGH for your interrupt so that this is the next thing serviced after softdevice code. This will improve the frequency of peripheral interrupt servicing but still wont be able to catch up high frequency interrupt.

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  • Hi,

    If you are using revision Rev 1 (QFAA-B00, QFAB-B00, CIAA-B00, CHAA-B00) or revision Engineering C (QFAA-BB0, CHAA-BA0, CIAA-BA0) chips then you do not need to implement PAN73 workaround. It only applies to older Engineering B (QFAA-BA0, CHAA-AA0) and Engineering A (QFAA-AA0, QFAA-AC0, CGAA-AA0) revisions.

    The behavior with peripheral interrupt along with softdevice activity has been discussed extensively in this forum. In short, the softdevice has highest priority over everything and depending on your BLE activity, softdevice will use CPU time that delays your peripheral interrupt being services until softdevice releases the CPU. You can use APP_IRQ_PRIORITY_HIGH for your interrupt so that this is the next thing serviced after softdevice code. This will improve the frequency of peripheral interrupt servicing but still wont be able to catch up high frequency interrupt.

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  • @aryan thanks for the quick response. The reason we're including PAN #73 is we've been developing our project mostly on dev kits PCA10040 v 0.9.0.. Top Mark QFAABA.

    I've tried changing the GPIOTE priority to APP_IRQ_PRIORITY_HIGH just now, and the behavior is identical. After the 8th interrupt, no additional I2C activity is observed on that line, but the other sensor is still responsive.

    The way our project is setup, is that the GPIOTE interrupt calls the interrupt event function, which adds most of the actual processing to the scheduler using app_sched_event_put().

    Any additional thoughts or reasons you can think of as to why this "scheduled" interrupt isn't being tended to?

    Thanks!

  • well you said that you are putting all the processing into the scheduler. Which interrupt context does the scheduler run (where do you call app_sched_event_get?) Well the third line says that the interrupt has happened so this means that nRF chip will not loose it (unless last two interrupts happened while softdevice locked the CPU in which case the former one will not be serviced)

    I would like to see some code, if you cannot share it, then please open a support case and you can share anything there as we would then be bound by NDA.

  • Sorry, i got little confused now. where are you checking for the flag being set? i mean is it inside another ISR? If your GPIOTE ISR is at higher priority than the one checking for flag, then interrupt occuring while in the ISR should be no problem, because then the context that checks for the flag will not get the chance to run at all. Maybe i did not understand correctly the overall architecture of what you are achieving to do. But could you please clarify priorities of GPIOTE ISR and the context where you are checking for the flag

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