Hi all,
In my project i want to transmit and receive one character by using 8051 controller. One is act as full transmitter and another one act as full receiver. In my side, SPI is working fine. In transmitter side, When i send a payload TX_DS is going high. So it seems data has been sent successfully. In Receiver side, When data is received that RX_DR is going high. So it seems data has arrived. Then i read the data from RX_FIFO and display by using UART. But it shows Junk or undtermined value that is not i sent. For example when i transmit character 'A', it receives 0x00 or 0x02 or 0x40. I am not sure where is the mistake. Here I am post my code. Please help me as soon as possible. Here i disabled auto ack. And address is E7 E7 E7 E7 E7 (5 bytes).
Details of functions i used.
spi_WBUF(); //write buffer spi_RBUF(); //Read buffer spi_WREG(); //Write the register spi_delay(); //15uS delay clear_irq(); //clears irq register get_status(); //when i call this function ack variable have status register's value
TX PAYLOAD AND CONFIGURATION:
unsigned char TX_PL(unsigned char *payload)
{
unsigned char stat;
spi_WBUF(W_REG|TX_ADDR,TX_ADDRESS,TX_ADD_WIDTH); //Set static TX address
spi_WBUF(W_REG|RX_ADDR_P0,TX_ADDRESS,TX_ADD_WIDTH); //Set static RX address for auto ack
clear_irq();
CE=0;
spi_WREG(FLUSH_TX,NOP);
spi_WREG(W_REG|CONFIG,0x00); //PRIM_RX : PTX
spi_WREG(W_REG|EN_AA,0x00); //Disable ShockBurst for data pipe 0
spi_WREG(W_REG|SETUP_AW,0x03); //Puts the address field width 5bytes
spi_WREG(W_REG|SETUP_PETR,0x1A); //Auto retransmit: wait 500us, 10 retries
spi_WREG(W_REG|RF_CH,0x6E); //Set frequency channel 110 (2.510MHz)
spi_WREG(W_REG|RF_SETUP,0x06); //Setup: 1Mbps, 0dBm, LNA off
spi_WREG(W_REG|CONFIG,0x02); //Set PWR_UP bit
spi_WBUF(W_TX_PL,payload,TX_PLOAD_WIDTH); //Write specified buffer to FIFO
CE=1;
spi_delay();
CE=0;
get_status();
clear_irq();
spi_WREG(FLUSH_TX,NOP);
if(MAX_RT)
return 0;
if(TX_DS)
return 1;
return stat;
}
RX PAYLOAD AND CONFIGURATION
unsigned char RX_PL()
{
spi_WREG(FLUSH_RX,NOP);
spi_WREG(W_REG|CONFIG,0x03); //Set PWR_UP bit ,PRIM_RX : PRX
spi_WREG(W_REG|EN_AA,0x00); //Disable ShockBurst for data pipe 0
spi_WREG(W_REG|SETUP_AW,0x03); // Puts the address field width 5bytes
spi_WREG(W_REG|RF_CH,0x6E); //Set frequency channel 110 (2.510MHz)
spi_WREG(W_REG|RF_SETUP,0x06); //Setup: 1Mbps, 0dBm, LNA off
spi_WREG(W_REG|EN_RXADDR,0x01); //Enable data pipe 0
spi_WBUF(W_REG|RX_ADDR_P0,TX_ADDRESS,TX_ADD_WIDTH); //Set static RX address
spi_WREG(W_REG|RX_PW_P0,TX_PLOAD_WIDTH); //Set RX payload length
CE=1;
spi_WREG(FLUSH_RX,NOP);
do //wait here until it receives something
{
get_status();
}while(RX_DR==0);
if(RX_DR)
{
clear_irq();
get_status(); //ack contains STATUS reg values
if(ack ==0)
{
spi_RBUF(R_RX_PL,TX_PLOAD_WIDTH); //After this line read_buf[0] contains RX_FIFO
spi_delay();
return read_buf[0];
}
}
}
Help me soon. If you have any doubt regarding my question, ask me. Thanks in advance !!!!!
