The gpio specifications table lists 3mA for VDD greater than 1.7V and 6mA for voltages greater than 2.7V but what about in between?
Would a linear approximation between those numbers be accurate to within 0.5mA?
The gpio specifications table lists 3mA for VDD greater than 1.7V and 6mA for voltages greater than 2.7V but what about in between?
Would a linear approximation between those numbers be accurate to within 0.5mA?
It is not linear, but you could approximate it to that. I don't know if it is within 0.5mA though.
3mA when VDD is greater than 1.7V is with a pad voltage of 0.4V, if you increase the current the pad voltage will increase. We recommend that you sink current instead of sourcing current from the chip, and recommended total current should be less than about 15mA.
It is not linear, but you could approximate it to that. I don't know if it is within 0.5mA though.
3mA when VDD is greater than 1.7V is with a pad voltage of 0.4V, if you increase the current the pad voltage will increase. We recommend that you sink current instead of sourcing current from the chip, and recommended total current should be less than about 15mA.