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Makefile syntax in SDK examples

Hi !

I've seen that the Makefile given with the examples changed a lot between SDK11 and SDK12, lots of improvements ! However there's still something I don't get. Why do you use this syntax :

SRC_FILES += \
$(SDK_ROOT)/components/libraries/log/src/nrf_log_backend_serial.c \
$(SDK_ROOT)/components/libraries/log/src/nrf_log_frontend.c \
$(SDK_ROOT)/components/libraries/button/app_button.c \

Instead of this one ?

SRC_FILES += $(SDK_ROOT)/components/libraries/log/src/nrf_log_backend_serial.c 
SRC_FILES += $(SDK_ROOT)/components/libraries/log/src/nrf_log_frontend.c 
SRC_FILES += $(SDK_ROOT)/components/libraries/button/app_button.c 

In my opinion the second one is better, mainly because it allows to do that :

SRC_FILES += $(SDK_ROOT)/components/libraries/log/src/nrf_log_backend_serial.c 
SRC_FILES += $(SDK_ROOT)/components/libraries/log/src/nrf_log_frontend.c 
SRC_FILES += $(SDK_ROOT)/components/libraries/button/app_button.c 
# Conditionally adding some_file to the build
ifeq($(SOME_MAKEFILE_VAR),1)
SRC_FILES += $(SDK_ROOT)/components/libraries/button/some_file.c 
endif

To conditionally add a file to the build, a folder to the include paths, a parameter to the compiler, etc.

By example you could use Makefile variables to add RTT files to the build, as well as defining (or not) NRF_LOG_USES_RTT.

Is there a reason for using the first syntax ?

Parents
  • The first syntax is a bit cleaner since each row only requires one variable. Also if, for example, you forget the "+" SRC_FILES will miss some of the .c files. The example below won't compile nrf_log_frontend.c

    SRC_FILES += $(SDK_ROOT)/components/libraries/log/src/nrf_log_backend_serial.c 
    SRC_FILES = $(SDK_ROOT)/components/libraries/log/src/nrf_log_frontend.c 
    SRC_FILES += $(SDK_ROOT)/components/libraries/button/app_button.c
    

    It does not preclude you from adding additional files later like in your example:

    ifeq($(SOME_MAKEFILE_VAR),1)
    SRC_FILES += $(SDK_ROOT)/components/libraries/button/some_file.c 
    endif
    
Reply
  • The first syntax is a bit cleaner since each row only requires one variable. Also if, for example, you forget the "+" SRC_FILES will miss some of the .c files. The example below won't compile nrf_log_frontend.c

    SRC_FILES += $(SDK_ROOT)/components/libraries/log/src/nrf_log_backend_serial.c 
    SRC_FILES = $(SDK_ROOT)/components/libraries/log/src/nrf_log_frontend.c 
    SRC_FILES += $(SDK_ROOT)/components/libraries/button/app_button.c
    

    It does not preclude you from adding additional files later like in your example:

    ifeq($(SOME_MAKEFILE_VAR),1)
    SRC_FILES += $(SDK_ROOT)/components/libraries/button/some_file.c 
    endif
    
Children
  • That's right but then you mix two syntaxes. For the point about forgetting some characters, I think whatever mistake you do, it will not end as expected. Anyway I'd typically copy-paste this kind of line which prevents the risk of failing the left part of the line since it's always the same.

    Small precision but I just ask this by curiosity, I don't think there is an absolute best practice here (even though I have a preference).

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