My company has been running into an issue with the NRF51822 where the MCU appears to enter debug mode unexpectedly and I wanted to see if any others had experienced the same problem.
I've read through the messages in the forum describing the possible need for a pulldown on the SWDCLK line to avoid noise, however I haven't seen others reporting exactly the same problems that my company has been seeing.
We've seen an issue with MCUs entering debug mode without a pulldown on the SWDCLK line, and recently ran some tests with a 470 ohm pulldown and still saw a device enter debug mode.
In addition, even though the device appeared to be in debug mode based upon the current draw and operation of the device, it still responded to a pin reset, which I believed shouldn't be possible when a device is in debug mode unless a write is done to the NRF_POWER->RESET register to enable pin reset.
After reading the forums, we've found other reports of devices going into debug mode due to noise on the SWDCLK line, so we put a 470 ohm pulldown on that line.
Even with the 470 ohm pulldown, we have found at least one device that entered debug mode while running through our hour long calibration process. Note that we do have a fairly long trace on the SWDCLK line, so we used a strong pulldown.
Sometimes when we find devices in debug mode, they still reset when we use the reset pin. My understanding is that this should not occur if a device is in debug mode unless a write is done to NRF_POWER->RESET.
I'm not sure if this is related.
But I posted a question where the nRF51 would not enter debug.
I have it connected, all the time via JLink, and I uploaded some code, but I think I must have had a pointer overflow.
But when I tried to upload, JLink would not connect.
I had to power cycle the device (a Smart Watch) in order to be able to upload.
PS. As far as I'm aware, no one answered my question about not being able to enter debug.
The short answers to your questions are: Yes, Yes, and No.
Debug interface mode is initiated by clocking one clock cycle on SWDCLK with SWDIO=1 [See ch. 11.1.2 Debug interface mode in nRF51 Reference Manual v3.0].
Depending on layout, grounding and housing, it is not unlikely that the SWDCLK trace can act as an "antenna" and for instance, if the device is subjected to strong electromagnetic fields close by (for example a cell phone at high output power), this might be picked up.
For the majority of the applications I am aware of this is not a problem, and this is typically something developers experience during prototype stage when the bare PCB is exposed to the environment.
We recommend to add a small resistor on the SWDCLK line to make it more robust [See reference circuitry in nRF51822 Product specification v3.1]. The resistor should be as small as possible, yet still make it possible to program the chip. We have recommended 1kohm.
If you still experience that the product enter debug mode, you might consider additional steps. For instance make the SWDCLK track as short as possible, have ground on all sides of the track to avoid crosstalk with other digital lines, and avoid that it can act as an antenna. You might consider replace the 1kohm with a 1nF capacitor (or less), this might affect programming speed.
As a last resort you might even consider connect a spare GPIO on the nRF51822 directly to SWDCLK, and set the spare GPIO to output low after power up. This will prevent re-programming, so you might want to have some means for the application to release the pin.
Have you succeeded to capture such an accidental noise event in SWDCLK line? It is very hard to believe the explanation, especially when there is that 470 ohm pull-down installed. It would need really strong external field to generate enough noise into that strongly grounded line. Or at least I think so. Is the SWDCLK somehow very different compared to other GPIO pins?
Yes, we are experiencing the same problem and it is really very frustrating. Is the nRF52832 any better in this sense?
My similar question is here: devzone.nordicsemi.com/.../
A pull down itself doesn't provide any filtering, so if you have instant energy applied to the trace, the pull down will only reduce the time, not necessarily the level. In such case a capacitor will be a better solution. The nRF52 requires 50clock cycles + 2 x 32-bit word required to enable debug mode.