nRF52832: UART buffers, PHY interface questions

[joedamato]

Hi,

Context

The chip will be a slave of a powerful CPU which is responsible for many coordinating tasks. The chip will connect the CPU via UART. I am interested in BLE.

It is important to minimise the interrupt rate and grab multiple bytes at once to improve efficiency.

Question

1. So, how large are the UART buffers and can we programmatically increase them?

2. Wouldn't a PHY interface connected to the CPU improve performance vs UART? (Not sure you have such product though)

Thanks

[RK]

1. With EasyDMA list mode the buffers are pretty much as big as you want them to be, subject to available RAM.

2. I don't understand this question at all. You use PHYs when you interface MACs to different physical transport mediums, here you are connecting two chips with traces.

I wouldn't use UART for this myself unless I had to, I'd use SPI, which you can run up to 4MHz. Also since the master controls the clock, it can clock in data whenever it wants, you just have to keep the buffers on the nRF full.

[joedamato]

My goal was to avoid those slow protocols by directly connecting the chip MAC with the CPU MAC interface (Cortex A53 support that). That would make this solution native BLE and potentially faster by reading bounds directly and accessing buffers in a very fast fashion.