Hello,
I bought few nRF24L01+ modules and I integrated them in some custom PCBs that I designed.
I haven't been able to transmit information:
- The TX FIFO is full (in FIFO_STATUS register TX_FULL = 1)
- The IRQ signal is never cleared
In order to send information:
- I send the payload (5 bytes) using the command W_TX_PAYLOAD
- I set PRIM_RX = 0 and PWR_UP = 1 in the CONFIG register (I turn on the transceiver and I set PTX)
- I wait ~2 ms
- I set CE = 1
- I wait 100 us
- I clear CE = 0
Nothing happens
- IRQ signal = 1
- The information is still in the FIFO TX
After setting PWR_UP = 1:
- I see how the Crystal starts oscillating
- I see a 1.8 V signal in VDD_PA pin
Configuration of the module:
Pin Configuration
- MOSI = SCK = CSN = 1
- CE = 0
Registers Configuration
-
Wait 100 ms to let the module turn on
-
CONFIG register = 0x00 (IRQ enabled, CRC Disabled, Power down, TX mode)
-
EN_AA register = 0x00 (Disable auto acknowledgement)
-
EN_RXADDR register = 0x01 (Enable data pipe 0)
-
SETUP_AW register = 0x03 (RX/TX Address = 5 bytes)
-
SETUP_RETR register = 0x00 (Re - Transmit Disabled)
-
RF_CH register = 76 (RF Channel selection)
-
RF_SETUP register = 0x00 (Disable continuous carrier TX, 1 Mbps data rate, Power = -18 dBm)
-
STATUS register = 0b01110000 (Reset STATUS register)
-
RX_ADDR_P0 register = 0xB6B5B4B305 (RX0 Address = 0xB6B5B4B305)
-
TX_ADDR register = 0xB6B5B4B305 (TX Address = 0xB6B5B4B305)
-
RX_PW_P0 register = 5 (Payload size = 5)
-
Flush TX FIFO (Command FLUSH_TX)
-
Flush RX FIFO (Command FLUSH_RX)
-
Power Up the module
-
I'm able to interact with the module via Software SPI; Is my assumption since the module is responsive to the commands I send and the values that I read are correct
-
The 3V3 power supply line is quite clean.
-
In addition to the suggested capacitors, I added a 100 uF capacitor between 3V3 and Ground to filter the signal and to give the extra current that the nRF24L01+ may need
-
I also tried powering up my design using an external DC Power Supply
-
I always send different payloads (until the TX FIFO is full)
-
I'm not using CRC, Acknowledges, etc. I thought it would be nice to keep it simple at the start.
-
I don't think the module is getting reset at any point, since the values in the configuration registers are unchanged. (I have checked this at different points)
-
Is there perhaps a specific order in which the module needs to be initialized? Timings?
I greatly appreciate your help, if you have concerns about Code Implementation, Schematics, Oscilloscope lectures, etc. Please let me know and I will gladly share the details.