RADIO ramp-up - what registers (if any) are latched?

[Wojtek]

I am trying to send lots of data through radio (basing on old micro esb project from github, but heavily modified). I need to keep radio IDLE (not DISABLED) when not transmitting, because ramp-up time sometimes is too long and i am loosing data i need to stream. I need to change PACKETPTR value after every transmission. However, I think that some RADIO registers cannot be changed after DISABLED->TXIDLE transition.

Could you specify which registers cannot be modified after ramp-up, if any? Maybe my problem lies somewhere else, but i am observing weird behavior when trying to change some registers after ramp-up - that is why i suspect there is some register latching.

I am using nRF52.

In nRF51 there was something like "Maximum consecutive transmission time". Does it also apply to nRF52?

My program flow is like this:

1. configure radio, wait for tx ramp up, stay in TXIDLE
2. SPIM transfer triggered by ppi from gpiote (800Hz)
3. data from spi is being processed
4. setting processed data to one of two buffers used by the radio (setting RADIO PACKETPTR)
5. radio task start
6. wait for another transfer, step 2.

Throughput of the radio is high enough for 800Hz with my payload, because when i DISABLE the radio after each succesfull transfer and do TXEN (shorted with start) to send the data, i am getting all the packets. But when I do as listed above, I loose about 30-40% of packets. I could go with disabling the RADIO, but I need higher SPIM trigger frequency (1.6kHz), and I am short of about 3 microseconds (using fast ramp-up) then.

[FormerMember]

PACKETPTR is a latched register when the radio is transmitting. When not transmitting, when in TXIDLE mode for instance, PACKETPTR is not latched. If changing/updating the value of PACKETPTR when the radio is transmitting, the radio will use the latched value. When the radio goes back to TXIDLE, the updated value for PACKETPTR is the one that will be used.

[Wojtek]

Thank You for your answer! If PACKETPTR changes only in TXIDLE, that is ok for me. All the rest of radio registers can be modified anytime, right? It seems that I have some other problem in my implementation then.

[FormerMember]

In general, the only registers that are latched are registers that are related to easyDMA. The reason is to be able to do double buffering and don't loose time between the transmission sequences.