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RADIO ramp-up - what registers (if any) are latched?

I am trying to send lots of data through radio (basing on old micro esb project from github, but heavily modified). I need to keep radio IDLE (not DISABLED) when not transmitting, because ramp-up time sometimes is too long and i am loosing data i need to stream. I need to change PACKETPTR value after every transmission. However, I think that some RADIO registers cannot be changed after DISABLED->TXIDLE transition.

Could you specify which registers cannot be modified after ramp-up, if any? Maybe my problem lies somewhere else, but i am observing weird behavior when trying to change some registers after ramp-up - that is why i suspect there is some register latching.

I am using nRF52.

In nRF51 there was something like "Maximum consecutive transmission time". Does it also apply to nRF52?

My program flow is like this:

  1. configure radio, wait for tx ramp up, stay in TXIDLE
  2. SPIM transfer triggered by ppi from gpiote (800Hz)
  3. data from spi is being processed
  4. setting processed data to one of two buffers used by the radio (setting RADIO PACKETPTR)
  5. radio task start
  6. wait for another transfer, step 2.

Throughput of the radio is high enough for 800Hz with my payload, because when i DISABLE the radio after each succesfull transfer and do TXEN (shorted with start) to send the data, i am getting all the packets. But when I do as listed above, I loose about 30-40% of packets. I could go with disabling the RADIO, but I need higher SPIM trigger frequency (1.6kHz), and I am short of about 3 microseconds (using fast ramp-up) then.

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  • Yes, it worked ok for me - there is no problem with transmission. I only got some hardware error that caused my hfclk go nuts and transmissions got broken then, but that was not the chip fault at all, but my oscillator. When i fixed that, i got really fast transmission (about 1.9mbps throughput)

    Also what is worth considering is the value of DTX bits in MODECNF0 register. Configure it properly so it is easier for the receiver to detect start of the transmission frame.

  • Also what is worth considering is the value of DTX bits in MODECNF0 register. Configure it properly so it is easier for the receiver to detect start of the transmission frame.

    Could you elaborate on this? What's the impact of the configuration and what do you mean by "configure it properly"?

    I assume, you mean it has to be configured equally on both sides? Or do you take the expected preamble into account?

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