I have a question about Makefile template used in all samples in SDK12.x
What is the sense of:
$(foreach target, $(TARGETS), $(call define_target, $(target)))
-include $(foreach target, $(TARGETS), $($(target)_dependencies))
Doesn't it be better to use:
$(call define_target, $(TARGET))
-include $($(TARGET)_dependencies)
When out of curiosity, I tried to define several targets compilation doesn't work. Is there any sample in sdk that make use of that?